HY
H. Yi
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2 records found
1
Journal article
(2022)
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Hengqian Yi, E. Öztürk, Marco Koelink, Jana Krimmling, Andrei A. Damian, Wojciech Debski, H.W. van Zeijl, Guoqi Zhang, René H. Poelma
High-performance IC-to-antenna interconnection is one of the key enablers for the mass production of high-end millimeter wave (mmW) radar systems above 100 GHz. In this work, a radar system with an on-package antenna array working at 122 GHz is presented. The antenna is placed on top of the molded package and the antenna-to-chip interconnection is realized by through-polymer via (TPV) technology. The detailed fabrication process of the radar antenna-in-package (AiP) with TPV is discussed. The results from the functional tests of the radar AiP are presented and benchmarked to a commercial quad-flat no-leads (QFN) package with an open antenna cavity. The detection margin between the echo signal and the constant false alarm rate (CFAR) threshold is approximately 10 dB higher for the TPV radar AiP compared with the benchmarked commercial QFN package.
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High-performance IC-to-antenna interconnection is one of the key enablers for the mass production of high-end millimeter wave (mmW) radar systems above 100 GHz. In this work, a radar system with an on-package antenna array working at 122 GHz is presented. The antenna is placed on top of the molded package and the antenna-to-chip interconnection is realized by through-polymer via (TPV) technology. The detailed fabrication process of the radar antenna-in-package (AiP) with TPV is discussed. The results from the functional tests of the radar AiP are presented and benchmarked to a commercial quad-flat no-leads (QFN) package with an open antenna cavity. The detection margin between the echo signal and the constant false alarm rate (CFAR) threshold is approximately 10 dB higher for the TPV radar AiP compared with the benchmarked commercial QFN package.
The rapid development of semiconductor industry in the past decades has reshaped the world tremendously and greatly changed people's lives. Two-dimensional (2D) down-sizing of semiconductor devices following the “Moore's law” for many years is now reaching its boundary conditions of further exponential growth and three-dimensional (3D) fabrication approaches are getting more attention. Next to the IC manufacturing, 3D chip packaging has been playing a more important role nowadays. Much more cost-effective and scalable technologies are being developed. Vertical interconnect via technology such as through-silicon via (TSV), through mold via (TMV), tall Cu pillar (TCP), and vertical wire bonds (VWB) are the key processes in 3D chip packaging. However, they have limitations in cost, reliability, via density, scalability, and aspect ratio. In addition, as the function integration density keeps increasing, not only electrical interconnection but also optical, mechanical, fluidic, and thermal interconnections are needed in the near future. Thus, a low-cost, reliable, high density, scalable, high-aspect-ratio multi-functional advanced through package via technology is highly demanded in the future semiconductor industry. Through-Polymer Via (TPV) is a novel bottom-up vertical through package via technology potentially low-cost process, suitable for high density and high-aspect-ratio via formation, compatible with the various packaging process and suitable for multi-functional applications. The main process of TPV technology consists of the formation of a high-aspect-ratio polymer structure through lithography in combination with subsequent film assisted molding. TPV process works with both spin coating and dry film lamination for applying the polymer material, which is suitable for low-cost wafer-level and panel-level mass production. The process uses thick photosensitive polymer materials, such as SU-8 and SUEX, and the structures are patterned via lithography, which enables a broad range of high density, and high-aspect-ratio features. Depending on the applications, non-coated polymer structures can serve for optical and mechanical functions while an optional functional coating is applied to the polymer structures to target specific applications, such as metal coating for electrical function.
...
The rapid development of semiconductor industry in the past decades has reshaped the world tremendously and greatly changed people's lives. Two-dimensional (2D) down-sizing of semiconductor devices following the “Moore's law” for many years is now reaching its boundary conditions of further exponential growth and three-dimensional (3D) fabrication approaches are getting more attention. Next to the IC manufacturing, 3D chip packaging has been playing a more important role nowadays. Much more cost-effective and scalable technologies are being developed. Vertical interconnect via technology such as through-silicon via (TSV), through mold via (TMV), tall Cu pillar (TCP), and vertical wire bonds (VWB) are the key processes in 3D chip packaging. However, they have limitations in cost, reliability, via density, scalability, and aspect ratio. In addition, as the function integration density keeps increasing, not only electrical interconnection but also optical, mechanical, fluidic, and thermal interconnections are needed in the near future. Thus, a low-cost, reliable, high density, scalable, high-aspect-ratio multi-functional advanced through package via technology is highly demanded in the future semiconductor industry. Through-Polymer Via (TPV) is a novel bottom-up vertical through package via technology potentially low-cost process, suitable for high density and high-aspect-ratio via formation, compatible with the various packaging process and suitable for multi-functional applications. The main process of TPV technology consists of the formation of a high-aspect-ratio polymer structure through lithography in combination with subsequent film assisted molding. TPV process works with both spin coating and dry film lamination for applying the polymer material, which is suitable for low-cost wafer-level and panel-level mass production. The process uses thick photosensitive polymer materials, such as SU-8 and SUEX, and the structures are patterned via lithography, which enables a broad range of high density, and high-aspect-ratio features. Depending on the applications, non-coated polymer structures can serve for optical and mechanical functions while an optional functional coating is applied to the polymer structures to target specific applications, such as metal coating for electrical function.