After reviewing fundamental architectural concepts and surveying the current landscape of state-of-the-art digital transmitters, this thesis introduces two novel techniques aimed at improving efficiency. The first contribution is a Class-E power amplifier featuring a reconfigurable output matching network, designed to enhance drain efficiency during power back-off. Building upon insights from this design, the second contribution addresses its limitations by proposing a hybrid transmitter architecture that overcomes the efficiency bottlenecks associated with high-frequency digital operation. The thesis concludes with key findings and formulates open research questions to guide future work in the field.