Modeling Static Noise Margin for FinFET based SRAM PUFs

Conference Paper (2020)
Author(s)

Shayesteh Masoumian (Intrinsic ID B.V., TU Delft - Computer Engineering)

Georgios Selimis (Intrinsic ID B.V.)

R Maes (Intrinsic ID B.V.)

GJ Schrijen (Intrinsic ID B.V.)

Said Hamdioui (TU Delft - Quantum & Computer Engineering)

M Taouil (TU Delft - Computer Engineering)

Research Group
Computer Engineering
Copyright
© 2020 S. Masoumian, Georgios Selimis, Roel Maes, Geert-Jan Schrijen, S. Hamdioui, M. Taouil
DOI related publication
https://doi.org/10.1109/ETS48528.2020.9131583
More Info
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Publication Year
2020
Language
English
Copyright
© 2020 S. Masoumian, Georgios Selimis, Roel Maes, Geert-Jan Schrijen, S. Hamdioui, M. Taouil
Research Group
Computer Engineering
Pages (from-to)
1-6
ISBN (print)
978-1-7281-4313-2
ISBN (electronic)
978-1-7281-4312-5
Reuse Rights

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Abstract

In this paper, we develop an analytical PUF model based on a compact FinFET transistor model that calculates the PUF stability (i.e. PUF static noise margin (PSNM)) for FinFET based SRAMs. The model enables a quick design space exploration and may be used to identify critical parameters that affect the PSNM. The analytical model is validated with SPICE simulations. In our experiments, we analyze the impact of process variation, technology, and temperature on the PSNM. The results show that the analytical model matches very well with the simulation model. From the experiments we conclude the following: (1) nFET variations have a larger impact on the PSNM than pFET (1.5% higher PSNM in nFET variations than pFET variations at 25°C), (2) high performance SRAM cells are more skewed (1.3% higher PSNM) (3) the reproducibility increases with smaller technology nodes (0.8% PSNM increase from 20 to 14 nm) (4) increasing the temperature from-10°C to 120°C leads to a PSNM change of approximately 1.0% for an extreme nFET channel length.

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