Real-Time Brain Simulation on Resource-Constrained FPGAs Using Neural Network-Based LUT Compression
Low-resource Hodgkin-Huxley Model Simulation
M. Mazurovs (TU Delft - Electrical Engineering, Mathematics and Computer Science)
C. Strydis – Mentor (TU Delft - Electrical Engineering, Mathematics and Computer Science)
J.S.S.M. Wong – Graduation committee member (TU Delft - Electrical Engineering, Mathematics and Computer Science)
W.A. Serdijn – Graduation committee member (TU Delft - Electrical Engineering, Mathematics and Computer Science)
L.P.L. Landsmeer – Mentor (TU Delft - Electrical Engineering, Mathematics and Computer Science)
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Abstract
Real-time simulation of biophysically accurate neuron models is essential for advanced neuromorphic computing and neuroprosthetic applications. The Hodgkin–Huxley (HH) model provides high biological fidelity but is computationally expensive, making large-scale FPGA implementations challenging. Existing hardware implementations typically trade biological accuracy for scalability or require substantial hardware resources to achieve real-time performance.
This thesis presents BrainLUT, a resource-efficient FPGA architecture that implements the nonlinear ion-channel computations of the HH model using neural network-generated lookup tables. The proposed approach leverages Quantisation-Aware Training (QAT) and adapted NeuraLUT and ReducedLUT methodologies to approximate complex HH functions with compact logic-based lookup tables, eliminating the need for expensive arithmetic evaluation while preserving model fidelity. Multiple hardware architectures and optimisation techniques, including structural decomposition, lookup table compression, derivative-based prediction, neural-network-based LUT generation, and reduced numerical precision, are explored to identify an optimal design.
The resulting proof-of-concept implementation simulates 1,250 Hodgkin–Huxley neurons in real time on a Xilinx Artix-7 XC7A200T FPGA operating at 125 MHz, utilising only 6,307 LUTs (4.71%), 15 BRAMs (3.01%), and 4 DSP blocks (0.54%). Although not achieving the highest absolute neuron count reported in the literature, the proposed architecture demonstrates substantially improved resource efficiency and neuron density compared with existing FPGA implementations of the Hodgkin–Huxley model. These results establish BrainLUT as a scalable and resource-efficient foundation for future large-scale, biophysically accurate neuromorphic systems.