Characterization and Modeling of MOSFET Gate Capacitance at Cryogenic Temperatures

Abstract

A reliable cryogenic device model is still missing despite the increasing demand for high-performance cryo-CMOS circuits. Although prior work proposed capacitance-voltage (CV) characterization to gain insights into the device cryogenic behavior, no accurate and comprehensive data is yet available. Moreover, the significant inconsistencies between the simulations using the available models and characterization data have not been investigated. To circumvent those shortcomings, this paper presents an extensive and accurate CV characterization over multiple geometries, frequencies, AC excitation voltages, and temperatures. Furthermore, we provide explanations for the observed deviations from the room-temperature characteristics and propose a model for a more accurate surface-potential calculation. Thanks to those data and the model, we can successfully simulate the CV curve of a transistor at cryogenic temperatures, which represents an essential step toward a complete cryogenic transistor model.