Assessment Of The Spike Detection Performance Of The Wired-OR Readout Architecture

Master thesis (2023)

Authors

Y.S. Landbrug Mechanical Engineering

Contributors

D.G. Muratore Bio-Electronics - EEMCS (supervisor 1)
C. Strydis Computer Engineering - EEMCS (supervisor 2)
T.M. Lopes Marta da Costa Bio-Electronics - EEMCS (supervisor 2)
Faculty
Mechanical Engineering
Copyright: © 2023 Yawende Landbrug
Neural interface Wired-OR Spike-detection
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Published Date

31-05-2023

Language

English

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Faculty

Mechanical Engineering

Abstract

Abstract—This paper investigates the performance of commonly used spike detection algorithms (Absolute Amplitude Thresholding and Non-linear Energy Operator) on compressed neural signals using a novel wired-OR lossy compression algorithm. Performing compression with the wired-OR architecture mainly removes the noisy baseline and preserves spikes in the neural signal. As a result, the spike detection sensitivity and accuracy improve or stay similar after compression. In addition, this paper proposes a new spike detection algorithm, the non-zero spike detector, that can be efficiently integrated into hardware with the wired-OR compression scheme. By using a firing rate-based approach to optimize the threshold in the non-zero spike detector, the proposed technique outperforms both Absolute Amplitude Thresholding and the Non-linear Energy Operator across different signal-to-noise ratios and firing rates. The wired-OR readout architecture, in combination with the non-zero spike detector, is a promising approach to achieve massive compression while preserving the neural signal and maintaining spike detection performance.