High temperature oxidation pre-treatment of textured c-Si wafers passivated by a-Si:H

Journal Article (2019)
Author(s)

G. Limodio (TU Delft - Photovoltaic Materials and Devices)

G. D'Herouville (Student TU Delft)

L. Mazzarella (TU Delft - Photovoltaic Materials and Devices)

Y. Zhao (TU Delft - Photovoltaic Materials and Devices)

Guangtao Yang (TU Delft - Photovoltaic Materials and Devices)

O. Isabella (TU Delft - Photovoltaic Materials and Devices)

M. Zeman (TU Delft - Electrical Sustainable Energy)

Research Group
Photovoltaic Materials and Devices
Copyright
© 2019 G. Limodio, G. D'Herouville, L. Mazzarella, Y. Zhao, G. Yang, O. Isabella, M. Zeman
DOI related publication
https://doi.org/10.1016/j.mssp.2019.03.008
More Info
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Publication Year
2019
Language
English
Copyright
© 2019 G. Limodio, G. D'Herouville, L. Mazzarella, Y. Zhao, G. Yang, O. Isabella, M. Zeman
Research Group
Photovoltaic Materials and Devices
Bibliographical Note
Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.@en
Volume number
97
Pages (from-to)
67-70
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Abstract


This work shows an alternative surface cleaning method for c-Si wafers to replace the standard chemical procedures as RCA or HNO
3
which involve hazardous chemicals or unstable processes. The method consists in a high-temperature oxidation treatment (HTO) performed in a classical tube furnace that incorporates organic and metal particles present on the c-Si surfaces in the growing SiO
2
layer. The result is as a reliable pre-treatment method for obtaining less defective c-Si surfaces ready for solar cell fabrication after SiO
2
removal. To test the surface passivation quality obtained with our alternative cleaning method, we grow amorphous silicon (a-Si:H) layers by plasma enhanced chemical vapor deposition on both sides of the c-Si wafer and systematically compare the effective carrier lifetime (τ
eff
) and implied V
OC
(iV
oc
) to the wafer treated with the standard cleaning in our laboratory. We optimize HTO treatment time reaching τ
eff
of ∼6 ms and iV
oc
of 721 mV for the best sample. We ascribe the improved passivation quality using HTO to two concurrent factors. Firstly, the encapsulation of defects into SiO
2
layer that is then etched prior a-Si:H deposition and secondly, to modification of the pyramids’ morphology that facilitates the surface passivation. SEM pictures and reflection measurements support the latter hypothesis.

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