Cryo-CMOS Sub-1K 16nm FinFET DAC for Fast Two-Qubit Gates in Spin Qubits

Conference Paper (2026)
Author(s)

Ilker Polat (TU Delft - QCD/Sebastiano Lab)

Ramon W.J. Overwater (TU Delft - QCD/Sebastiano Lab)

Bagas Prabowo (TU Delft - QCD/Babaie Lab)

Stefano Reale (TU Delft - QCD/Vandersypen Lab)

Davide Degli Esposti (TU Delft - QCD/Vandersypen Lab)

Kenji Capannelli (TU Delft - QCD/Vandersypen Lab)

Maximilian Rimbach-Russ (TU Delft - QCD/Rimbach-Russ)

Lieven M.K. Vandersypen (TU Delft - Applied Sciences, TU Delft - QCD/Vandersypen Lab)

Masoud Babaie (TU Delft - Electrical Engineering, Mathematics and Computer Science, TU Delft - QCD/Babaie Lab)

Fabio Sebastiano (TU Delft - QCD/Sebastiano Lab, TU Delft - Electrical Engineering, Mathematics and Computer Science)

Research Group
QCD/Sebastiano Lab
DOI related publication
https://doi.org/10.1109/VLSITechnologyandCir65830.2026.11577344 Final published version
More Info
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Publication Year
2026
Language
English
Research Group
QCD/Sebastiano Lab
Publisher
IEEE
ISBN (electronic)
9798331580964
Event
2026 IEEE/JSAP Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2026 (2026-06-14 - 2026-06-18), Honolulu, United States
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Abstract

This paper presents a cryo-CMOS DAC for driving two-qubit gates in semiconductor spin qubits. Thanks to a current-integrating coarse/fine architecture implemented in a 16-nm FinFET process, the proposed design generates adiabatic waveforms for very fast (<50 ns) high-fidelity operations, while operating at sub- 1 K temperatures with a small footprint (0.026 mm2) and low power (275 μ W), thus demonstrating its compatibility with qubit co-integration.

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