Seneca-Lite: Open-source RISC-V based Multi-Core Neuromorphic Platform
Y. Gopinath (TU Delft - Electrical Engineering, Mathematics and Computer Science)
R.K. Bishnoi – Mentor (TU Delft - Computer Engineering)
Said Hamdioui – Mentor (TU Delft - Computer Engineering)
R. V. Venkatesha Prasad – Mentor (TU Delft - Networked Systems)
Gert-Jan Van Schaik – Mentor (Stichting IMEC Nederland)
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Abstract
Neuromorphic architectures are energy efficient architectures for executing spiking neural networks. Current open-source neuromorphic hardware projects are either experimentation platforms (RANC, ODIN) or neural network accelerators (Open-Spike, SNE), there are no direct processing platforms that support AI and ML applications. Seneca-Lite is an open-source RISC-V based multicore neuromorphic platform. The goal of Seneca-Lite is to enable new possibilities for AI and ML applications and foster more collaboration in this field. The platform is intended for research and academic purposes and furthering the field of neuromorphic computing.
The Seneca-Lite platform utilizes the Ibex core, a highly parameterizable open-source 32 bit RISC-V processor. Each core in the Seneca-Lite platform contains a Network On Chip (NoC) router, local memories, network message FIFOs and interconnects. The multi-core platform is designed to facilitate messaging between cores via the NoC. The NoC used in Seneca-Lite is the same as the NoC used in RANC (Reconfigurable Architecture for Neuromorphic Computing). The number of cores in the system is parameterized and can be controlled by the user depending on their need. Since the platform is open-source, many of the internal parameters (Ibex parameters, FIFO parameters etc) can be tweaked by the user as per their target application.
The completed neuromorphic platform is benchmarked for various state-of-the-art applications and compared to other neuromorphic platforms.