High-Power, Efficient, and Wideband Front-Ends for 5G Transmitters

Abstract

The ever-increasing demand for data transmission, driven by the need to support global economic growth, is being addressed by fifth-generation (5G) networks. 5G offers several advantages over previous cellular generations, including low network latency, enhanced link robustness, improved mobility, energy efficiency, and superior spectral efficiency. These advancements are expected to have a transformative impact on industries worldwide by creating new job opportunities and boosting productivity. To achieve multi-Gbit/s data transmission and low-latency line-of-sight links, 5G systems utilize the millimeter-wave (mm-wave) spectrum and advanced modulation schemes such as quadrature amplitude modulation (QAM). The mm-wave spectrum supports large modulation bandwidths that enable higher data rates but suffer from increased signal attenuation. Similarly, spectrally efficient higher-order modulation schemes like QAM improve data rates but require higher signal-to-noise ratio (SNR). By combining mm-wave spectrum usage with complex modulation schemes and phased arrays, 5G networks achieve high-speed, low-latency performance. However, this also imposes stringent requirements on output power (Pout), error vector magnitude (EVM), and adjacent channel leakage ratio (ACLR). Additionally, orthogonal frequency-division multiplexing (OFDM) is used in 5G for its high spectral efficiency, immunity to frequency selective fading, and power efficiency. However, it introduces high peak-to-average power ratio (PAPR) that necessitate efficiency at both peak power and power back-off (PBO) in transmitters (TXs).

Chapter 2 examines the fundamental performance metrics in power amplifier (PA) design, which serves as a critical bottleneck in mm-wave 5G systems. It reviews various PA classes, explores challenges associated with mm-wave operation, and discusses existing solutions. The chapter also introduces design equations for a 2-way Doherty PA and evaluates its operation and performance. While N-way Doherty PAs show promise for achieving required power levels and improving average efficiency in complementary metal-oxide-semiconductor (CMOS) technology, they face limitations such as narrow bandwidth, low gain, nonlinearity, and sensitivity to voltage standingwave ratio (VSWR). These challenges make mm-wave N-way Doherty PAs an active area of research.

Chapter 3 presents a systematic design process for 3-/4-/5-way Doherty networks using transmission lines (TLs) and lumped elements, which can also be extended to N-way configurations. These power combiners are designed and compared using both lossless and lossy components with a quality factor (QF) of 15/25 for inductors/capacitors at 30 GHz, while their PAs are modeled as ideal current sources. Based on this analysis, it reveals that the 3-way network is themost efficient and practical candidate for mm-wave frequencies, requiring fewer components and offering comparable performance to the 4-way configuration.

Chapter 4 introduces a single-supply balun-first 3-way parallel Doherty PA designed for mm-wave 5G applications. This design incorporates a bandwidth enhancement technique to broaden the operational frequency range, improve broadband PBO efficiency, and reduce impedance mismatches. Realized in 40 nm CMOS bulk technology with a core area of 0.77mm2, the prototype achieves a Psat/peak gain of over 20 dBm/16 dB and demonstrates a drain efficiency (DE) of 15 %/22 %/33% at 9.5 dB/6 dB /0 dB PBO across a 24–30GHz band. It supports 64-QAM OFDM signals with an EVM/ACLR of −24.3 dB/−30.1 dBc at 9.4dBm average output power (Pavg) and achieves promising results with 1024-QAM signals. However, the 3-way Doherty PAs show efficiency limitations compared to 2-way Doherty PAs at 9.5 dB PBO due to finite QF of the drain-source capacitance (Cds), device channel resistance, and higher passive losses of the output network.

Chapter 5 describes a 4×2-way Doherty PA designed for mm-wave 5G applications. Featuring an advanced output combiner with four differential 2-way Doherty networks, two quadrature hybrid couplers (QHCs), and a balun, this design enhances Pout and PBO efficiency. Realized in 40 nm CMOS bulk technology with a core area of 1.54mm2, the prototype achieves a Psat/peak gain of 25.2dBm/25.5 dB and a DE of 17.5 %/10% at 0 dB/6 dB PBO across a 26–32GHz band. It delivers exceptional EVM/ACLR performance for both 64-QAM and 1024-QAM OFDM signals and demonstrates resilience to VSWR variations. By incorporating artificial intelligence digital pre-distortion (AI-DPD), the PA achieves a Pavg of 15.3dBm for 400MHz 64-QAM signals, making it a strong candidate for 5G mm-wave TXs or phased arrays.

Chapter 6 summarizes the findings of the thesis, compares them with the state-of-the-art, and highlights key conclusions. It also suggests future research directions, such as a novel floor plan for the TX chain. This includes the use of four 2-way series Doherty PAs to achieve high output power and improved PBO efficiency. Additionally, flip-chip integration is proposed to position antenna connection pads centrally, reducing interconnect parasitics and unwanted losses.