AeDAM: An Event-Driven Architecture Mapping exploration tool

Master Thesis (2025)
Author(s)

N.S. Malladi (TU Delft - Electrical Engineering, Mathematics and Computer Science)

Contributor(s)

Said Hamdioui – Mentor (TU Delft - Computer Engineering)

Rajendra Bishnoi – Mentor (TU Delft - Computer Engineering)

Kanishkan Vadivel – Mentor (Stichting IMEC Nederland)

R.R. Venkatesha Prasad – Graduation committee member (TU Delft - Networked Systems)

Faculty
Electrical Engineering, Mathematics and Computer Science
More Info
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Publication Year
2025
Language
English
Graduation Date
30-06-2025
Awarding Institution
Delft University of Technology
Programme
['Electrical Engineering | Embedded Systems']
Sponsors
Imec
Faculty
Electrical Engineering, Mathematics and Computer Science
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Abstract

Event-driven neural network accelerators achieve superior energy efficiency by processing only meaningful data events, yet existing design space exploration tools lack support for their asynchronous execution characteristics. This thesis introduces AeDAM (Event-Driven Architecture Mapping), a specialized framework for systematic exploration of event-driven accelerator architectures.

AeDAM transforms traditional synchronous mapping methodologies into event-driven configurations through intelligent Loop Order Memory Access scheduling and specialized analytical cost models for asynchronous dataflows, targeting energy-delay product optimization.
Experimental validation using the SENECA neuromorphic architecture demonstrates substantial improvements: 2.5× faster exploration times, 13-52% latency reductions across VGGNet layers, and 12× energy-delay product improvements. Optimal configurations feature 512KB SRAM capacity and multi-dimensional processing element arrays.

AeDAM establishes a foundation for systematic exploration of energy-efficient event driven computing systems targeting edge applications.

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