Cryogenic CMOS supply voltage regulator for quantum computing applications

Master Thesis (2018)
Author(s)

J.C. Salentijn (TU Delft - Electrical Engineering, Mathematics and Computer Science)

Contributor(s)

F. Sebasatiano – Mentor

E Charbon-Iwasaki-Charbon – Graduation committee member

M Babaie – Graduation committee member

Faculty
Electrical Engineering, Mathematics and Computer Science
Copyright
© 2018 Jaco Salentijn
More Info
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Publication Year
2018
Language
English
Copyright
© 2018 Jaco Salentijn
Graduation Date
28-11-2018
Awarding Institution
Delft University of Technology
Faculty
Electrical Engineering, Mathematics and Computer Science
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Abstract

Quantum computers are able to deal with large problems, like molecular modelling, financial prediction and cryptography. A classical controller is used to control the qubits of the quantum computer. A proposed controller, operating at 4K, needs a clean voltage supply in order to function well. The long interconnects between the room temperature power supplies and the 4K classical controller are not loss-less and do have parasitic capacitance and inductance. Low drop-out (LDO) voltage regulators are able to clean this dirty supply voltage and produce a stable, regulated voltage. Therefore, a cryogenic 40nm CMOS LDO voltage is designed. This regulated is designed with room temperature models and optimized for operating at 4K. The specification are competitive to other LDO voltage regulators.

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