Cryogenic CMOS supply voltage regulator for quantum computing applications

Master thesis (2018)

Authors

J.C. Salentijn Electrical Engineering, Mathematics and Computer Science

Contributors

F. Sebastiano (mentor)
E. Charbon-Iwasaki-Charbon (graduation committee member)
M. Babaie (graduation committee member)
Faculty
Electrical Engineering, Mathematics and Computer Science, Electrical Engineering, Mathematics and Computer Science
Copyright: © 2018 Jaco Salentijn
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Published Date

28-11-2018

Language

English

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Faculty

Electrical Engineering, Mathematics and Computer Science

Abstract

Quantum computers are able to deal with large problems, like molecular modelling, financial prediction and cryptography. A classical controller is used to control the qubits of the quantum computer. A proposed controller, operating at 4K, needs a clean voltage supply in order to function well. The long interconnects between the room temperature power supplies and the 4K classical controller are not loss-less and do have parasitic capacitance and inductance. Low drop-out (LDO) voltage regulators are able to clean this dirty supply voltage and produce a stable, regulated voltage. Therefore, a cryogenic 40nm CMOS LDO voltage is designed. This regulated is designed with room temperature models and optimized for operating at 4K. The specification are competitive to other LDO voltage regulators.

Files

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