Energy-Efficient Multi-Operand XOR Logic-Based CIM Accelerator using RRAM technology

Conference Paper (2025)
Author(s)

Abhairaj Singh (Ibm Research Europe, TU Delft - Computer Engineering)

Konstantinos Stavrakakis (TU Delft - Computer Engineering)

Rajendra Bishnoi (TU Delft - Computer Engineering)

Rajiv V. Joshi (TU Delft - Computer Engineering)

Said Hamdioui (TU Delft - Computer Engineering)

Research Group
Computer Engineering
DOI related publication
https://doi.org/10.1109/ICCAD66269.2025.11240975 Final published version
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Publication Year
2025
Language
English
Research Group
Computer Engineering
Publisher
IEEE
ISBN (electronic)
9798331515607
Event
44th IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2025 (2025-10-26 - 2025-10-30), Munich, Germany
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Abstract

Recent advances in Resistive RAM (RRAM) based Computation-In-Memory (CIM) architectures highlight significant potential for accelerating data-intensive computing tasks. However, non-idealities in RRAM devices, such as variability, result in small sensing margins that can significantly affect the computational efficiency. This issue becomes even more pronounced when dealing with complex multi-operand logic operations. This paper introduces a circuit-level scheme for CIM-based multi-operand XOR logic operations, leveraging a Voltage-To-Time converter (VTC) to perform multi-phased XORs in a single clock cycle. In this approach, we exploit bitline capacitances for voltage-based sensing during computation, generating an output voltage that is linearly proportional to the operand values. This voltage is then converted into the desired logic output using the VTC design. Furthermore, low-power techniques are employed in the deployment of sense amplifiers, such as regulating power consumption during operation and disabling the amplifiers once the decision is made. Simulation results for a post-layout extracted 512x512 (256Kb) RRAM-based CIM array show that up to 16-operand XOR operation can be accurately and reliably performed as opposed to a maximum of three operands supported by state-of-the-art solutions, while offering up to 49× better figure-of-merit combining energy-efficiency and throughput.

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