FeFET Device Modelling and Circuit Design

Abstract

Ferroelectric Field-Effect Transistors (FeFETs) are incredibly promising for the next wave
of computing among emerging NVMs because of their ability to perform as both logic and
memory device and low operation power, especially in areas like computation-in-memory and
neuromorphic applications. However, a hurdle to their adoption has been the lack of an open-
source, physics-based simulation model that is both accurate and SPICE-compatible. Existing
models often fall short by not accouting for the polycrystalline physics of the ferroelectric material,
and they don’t always account for crucial effects like leakage currents. This thesis introduces an
open-source SPICE-compatible FeFET model built on the Nucleation-Limited Switching (NLS)
framework, which is designed to accurately capture the time-dependent nature of the device’s
polarization. This model is validated by comparing its output against actual experimental data
from fabricated FeFETs and FeCAPs. A key part of this work was integrating non-ideal effects
like temperature changes and device-to-device variations, making the model more robust. The
model’s functionality is tested by simulating core FeFET operations including non-volatile
writes and non-destructive reads, and demonstrated its application within a multiply-and-
accumulate circuit which is used in computation-in-memory applications. Ultimately, this
thesis provides a reliable simulation model that includes a physics-based implementation of
hysteresis and leakage current effects that can be used to design and simulate circuits with
computation-in-memory applications.