Packaging Technologies for Single-Side Cooling SiC Power Modules With Low Parasitic Inductance
A Review
Keyvan Yari (TU Delft - Electrical Engineering, Mathematics and Computer Science)
Alireza Mehrabi (TU Delft - Electrical Engineering, Mathematics and Computer Science)
René H. Poelma (Nexperia, TU Delft - Electrical Engineering, Mathematics and Computer Science)
Sijun Du (TU Delft - Electrical Engineering, Mathematics and Computer Science)
Willem D. van Driel (TU Delft - Electrical Engineering, Mathematics and Computer Science)
Guo Qi Zhang (TU Delft - Electrical Engineering, Mathematics and Computer Science)
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Abstract
Due to the better performance of the Wide Band Gap (WBG) devices, there has been a paradigm shift toward WBG-based power modules for diverse applications like Electric Vehicles (EVs). However, the high parasitic inductance value of power modules hinders these devices from unlocking their full potential. Therefore, this paper comprehensively reviews SiC-based Single Side Cooling (SSC) power modules that benefit from low parasitic inductance. The paper also discusses the need to develop newer power modules using modern packaging methods. The surveyed power modules are categorized into three main groups, namely wire bonding, hybrid, and 3D packaging methods. This classification contains several vital parameters of the studied power modules, such as nominal and Double Pulse Tests (DPT) power ratings, parasitic inductance, size, etc. The main features and characteristics corresponding to the reviewed power modules' packaging methods and techniques are also briefly described. Finally, a thorough discussion about challenges and future trends is highlighted before concluding the paper.
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