A 125 ?m-Pitch-Matched Transceiver ASIC With Micro-Beamforming ADC and Multi-Level Signaling for 3-D Transfontanelle Ultrasonography

Journal Article (2024)
Author(s)

P. Guo (TU Delft - Bio-Electronics)

F. Fool (TU Delft - ImPhys/Verweij group)

Z.Y. Chang (TU Delft - Electronic Instrumentation)

E. Noothout (TU Delft - ImPhys/Verweij group)

H.J. Vos (TU Delft - ImPhys/Verweij group)

J.W. Bosch (TU Delft - Geo-engineering, Thoraxcenter)

N. de Jong (TU Delft - ImPhys/Verweij group, TU Delft - ImPhys/De Jong group)

M. Verweij (TU Delft - ImPhys/Verweij group, TU Delft - ImPhys/Medical Imaging)

M. Pertijs (TU Delft - Electronic Instrumentation)

Research Group
Bio-Electronics
DOI related publication
https://doi.org/10.1109/JSSC.2024.3355854
More Info
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Publication Year
2024
Language
English
Research Group
Bio-Electronics
Issue number
8
Volume number
59
Pages (from-to)
2604-2617
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Abstract

This article presents a pitch-matched transceiver application-specific integrated circuit (ASIC) for a wearable ultrasound device intended for transfontanelle ultrasonography, which includes element-level 20-V unipolar pulsers with transmit (TX) beamforming, and receive (RX) circuitry that combines eightfold multiplexing, four-channel micro-beamforming (?BF), and subgroup-level digitization to achieve an initial 32-fold channel-count reduction. The ?BF is based on passive boxcar integration, merged with a 10-bit 40 MS/s SAR ADC in the charge domain, thus obviating the need for explicit anti-alias filtering (AAF) and power-hungry ADC drivers. A compact and low-power reference generator employs an area-efficient MOS capacitor as a reservoir to quickly set a reference for the ADC in the charge domain. A low-power multi-level data link, based on 16-level pulse-amplitude modulation, concatenates the outputs of four ADCs, providing an overall 128-fold channel-count reduction. A prototype transceiver ASIC was fabricated in a 180-nm BCD technology, and interfaces with a 2-D PZT transducer array of 16 × 16 elements with a pitch of 125 ?m and a center frequency of 9 MHz. The ASIC consumes 1.83 mW/element. The data link achieves an aggregate 3.84 Gb/s data rate with 3.3 pJ/bit energy efficiency. The ASIC's functionality has been demonstrated through electrical, acoustic, and imaging experiments.

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