Board level vibration test method of components for automotive electronics

State-of-the-art approaches and challenges

Review (2022)

Authors

V. Thukral NXP Semiconductors Germany, Electronic Components, Technology and Materials - EEMCS
M. van Soestbergen NXP Semiconductors
J.J.M. Zaal NXP Semiconductors
R. Roucou NXP Semiconductors
R. T.H. Rongen NXP Semiconductors
W.D. van Driel Electronic Components, Technology and Materials - EEMCS
Kouchi Zhang Electronic Components, Technology and Materials - EEMCS
Research Group
Electronic Components, Technology and Materials (EEMCS) (TU Delft)
Copyright: © 2022 V. Thukral, M. van Soestbergen, J.J.M. Zaal, R. Roucou, R.T.H. Rongen, W.D. van Driel, Kouchi Zhang
DOI
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https://doi.org/10.1016/j.microrel.2022.114830
Board level reliability PCB dynamic response Ball grid array packages Board level vibration test JEDEC standards Wafer level chip scale packages
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Published Date

2022

Language

English

Reuse Rights

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Faculty

Electrical Engineering, Mathematics and Computer Science

Department

Microelectronics

Research Group

Electronic Components, Technology and Materials

Abstract

Board level vibration testing is intended to assess prediction of the reliability of solder joint interconnects that are formed between electronic components and printed circuit boards (PCB). Frailties in the stress test experiment might lead to false board level reliability (BLR) evaluations. Therefore, it is essential to have a well-characterized board level vibration test method. Currently, there is no industrial test standard that prescribes board level vibration test method for electronic components at the PCB level. This paper examines the vibration test standards that are currently available in the industry and their applicability at the solder joint interconnect level. Next to that, it surveys the state-of-the-art board level vibration test setups and their impact on PCB dynamic loading and reliability at solder joint-PCB interface. It collates research on major building blocks of a board level vibration test method that includes vibration measurement techniques, PCB assemblies under test, board mounting schemes, operating environments, fault detection systems, and vibration test stress conditions that are currently used in the domain of solder joint level vibration testing. The findings from this paper are expected to reveal pitfalls and challenges while setting up board level vibration test experiments for electronic components. In addition, this paper attempts to identify research efforts that are required to make board level vibration testing a more credible means for assessing solder joint reliability. Outcomes from this study can further be used to guide future board level vibration specifications for electronic components.