A Fully-Integrated Digital-Intensive Polar Doherty Transmitter
Yiyu Shen (TU Delft - Electronics)
M. Mehrpoo (TU Delft - OLD QCD/Charbon Lab)
M. Hashemi (TU Delft - Electronics)
Michael E. Polushkin (External organisation)
Lei Zhou (Ampleon Netherlands)
Mustafa Acar (Ampleon Netherlands)
TGRM van Leuken (TU Delft - Signal Processing Systems)
Morteza Alavi (TU Delft - Electronics)
Leonardus Cornelis Nicolaas de Vreede (TU Delft - Electronics)
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Abstract
This paper presents an advanced 2.3-2.8 GHz fully-integrated
digital-intensive polar Doherty transmitter realized in 40nm standard
CMOS. The proposed architecture comprises CORDIC, digital delay
aligners, interpolators, digital pre-distortion (DPD) circuitry in
combination with frequency-agile wideband phase modulators followed by
the digital main and peak power amplifier (PA) operating in quasi-load
insensitive class-E using an on-chip power combiner. At 2.5 GHz, its
maximum output power is +21.4 dBm. Drain efficiency is 49.4% at peak
power, and 33.7% at 6-dB power back-off. Applying DPD for a 20-MHz
64-QAM signal, the measured EVM is better than -30 dB while the average
drain efficiency is 24%.
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