A Fully-Integrated Digital-Intensive Polar Doherty Transmitter

Conference Paper (2017)
Author(s)

Yiyu Shen (TU Delft - Electronics)

M. Mehrpoo (TU Delft - OLD QCD/Charbon Lab)

M. Hashemi (TU Delft - Electronics)

Michael E. Polushkin (External organisation)

Lei Zhou (Ampleon Netherlands)

Mustafa Acar (Ampleon Netherlands)

TGRM van Leuken (TU Delft - Signal Processing Systems)

Morteza Alavi (TU Delft - Electronics)

Leonardus Cornelis Nicolaas de Vreede (TU Delft - Electronics)

Research Group
Electronics
DOI related publication
https://doi.org/10.1109/RFIC.2017.7969051
More Info
expand_more
Publication Year
2017
Language
English
Related content
Research Group
Electronics
Pages (from-to)
196 - 199
ISBN (electronic)
978-1-5090-4626-3

Abstract

This paper presents an advanced 2.3-2.8 GHz fully-integrated
digital-intensive polar Doherty transmitter realized in 40nm standard
CMOS. The proposed architecture comprises CORDIC, digital delay
aligners, interpolators, digital pre-distortion (DPD) circuitry in
combination with frequency-agile wideband phase modulators followed by
the digital main and peak power amplifier (PA) operating in quasi-load
insensitive class-E using an on-chip power combiner. At 2.5 GHz, its
maximum output power is +21.4 dBm. Drain efficiency is 49.4% at peak
power, and 33.7% at 6-dB power back-off. Applying DPD for a 20-MHz
64-QAM signal, the measured EVM is better than -30 dB while the average
drain efficiency is 24%.

No files available

Metadata only record. There are no files for this record.