A Wideband Low-Power Cryogenic CMOS Circulator for Quantum Applications

Journal Article (2020)
Author(s)

Andrea Ruffino (École Polytechnique Fédérale de Lausanne)

Yatao Peng (École Polytechnique Fédérale de Lausanne)

F. Sebasatiano (TU Delft - (OLD)Applied Quantum Architectures)

Masoud Babaie (TU Delft - Electronics)

E. Charbon (École Polytechnique Fédérale de Lausanne)

Research Group
(OLD)Applied Quantum Architectures
Copyright
© 2020 A. Ruffino, Yatao Peng, F. Sebastiano, M. Babaie, E. Charbon-Iwasaki-Charbon
DOI related publication
https://doi.org/10.1109/JSSC.2020.2978020
More Info
expand_more
Publication Year
2020
Language
English
Copyright
© 2020 A. Ruffino, Yatao Peng, F. Sebastiano, M. Babaie, E. Charbon-Iwasaki-Charbon
Research Group
(OLD)Applied Quantum Architectures
Issue number
5
Volume number
55
Pages (from-to)
1224-1238
Reuse Rights

Other than for strictly personal use, it is not permitted to download, forward or distribute the text or part of it, without the consent of the author(s) and/or copyright holder(s), unless the work is under an open content license such as Creative Commons.

Abstract

Quantum computers require classical electronics to ensure fault-tolerant operation. To address compactness and scalability, it was proposed to implement such electronics as integrated circuits operating at cryogenic temperatures close to those at which quantum bits (qubits) operate. Circulators are among the most common blocks used in the qubit readout chain, but they are currently discrete devices with a bulky footprint, thus preventing large-scale system integration. For this reason, we present here a detailed description of the first fully integrated CMOS circulator operating from 300 K down to 4.2 K to be an integral part of cryogenic quantum computing platforms. At 300 K, the circuit's operating frequency is centered around 6.5 GHz with 28% fractional bandwidth, and it has 2.2-dB insertion loss, 2.4-dB noise figure, and 18-dB isolation while consuming 2.5-mW core power. These results are achieved thanks to a fully passive architecture based on LC all-pass filters, which allows achieving a 1.6\times increase in fractional bandwidth and the lowest power consumption with respect to the state of the art while using only 0.45 mm2 of core area. This allows miniaturization of circulators in power-constrained multi-qubit readout systems.