A Survey on Memory-centric Computer Architectures

Journal Article (2022)
Authors

Anteneh Gebregiorgis (TU Delft - Computer Engineering)

HA Du Nguyen

Jintao Yu

Rajendra bishnoi (TU Delft - Computer Engineering)

Mottaqiallah Taouil (TU Delft - Computer Engineering)

Catthoor Franky (Imec)

Said Hamdioui (TU Delft - Computer Engineering)

Research Group
Computer Engineering
Copyright
© 2022 A.B. Gebregiorgis, H.A. Du Nguyen, J. Yu, R.K. Bishnoi, M. Taouil, Catthoor Franky, S. Hamdioui
To reference this document use:
https://doi.org/10.1145/3544974
More Info
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Publication Year
2022
Language
English
Copyright
© 2022 A.B. Gebregiorgis, H.A. Du Nguyen, J. Yu, R.K. Bishnoi, M. Taouil, Catthoor Franky, S. Hamdioui
Research Group
Computer Engineering
Bibliographical Note
Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public. @en
Issue number
4
Volume number
18
Pages (from-to)
1
DOI:
https://doi.org/10.1145/3544974
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Abstract

Faster and cheaper computers have been constantly demanding technological and architectural improvements. However, current technology is suffering from three technology walls: leakage wall, reliability wall, and cost wall. Meanwhile, existing architecture performance is also saturating due to three well-known architecture walls: memory wall, power wall, and instruction-level parallelism (ILP) wall. Hence, a lot of novel technologies and architectures have been introduced and developed intensively. Our previous work has presented a comprehensive classification and broad overview of memory-centric computer architectures. In this article, we aim to discuss the most important classes of memory-centric architectures thoroughly and evaluate their advantages and disadvantages. Moreover, for each class, the article provides a comprehensive survey on memory-centric architectures available in the literature.

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