Weight-four parity checks in a spin-shuttling architecture
Brennan Undseth (TU Delft - QCD/Vandersypen Lab, Kavli institute of nanoscience Delft, TU Delft - QuTech Advanced Research Centre)
Nicola Meggiato (TU Delft - QCD/Vandersypen Lab, Kavli institute of nanoscience Delft, TU Delft - QuTech Advanced Research Centre)
Yi Hsien Wu (Kavli institute of nanoscience Delft, TU Delft - QuTech Advanced Research Centre, TU Delft - QCD/Vandersypen Lab)
Sam R. Katiraee-Far (TU Delft - QuTech Advanced Research Centre, Kavli institute of nanoscience Delft, TU Delft - QCD/Vandersypen Lab)
Larysa Tryputen (TNO)
Sander L. de Snoo (TU Delft - QCD/Vandersypen Lab, Kavli institute of nanoscience Delft, TU Delft - QuTech Advanced Research Centre)
Davide Degli Esposti (Kavli institute of nanoscience Delft, TU Delft - QuTech Advanced Research Centre, TU Delft - QCD/Vandersypen Lab)
Giordano Scappucci (TU Delft - QuTech Advanced Research Centre, Kavli institute of nanoscience Delft, TU Delft - Electrical Engineering, Mathematics and Computer Science, TU Delft - QCD/Scappucci Lab)
Eliška Greplová (Kavli institute of nanoscience Delft, TU Delft - QCD/Greplova Lab, TU Delft - Applied Sciences, TU Delft - QuTech Advanced Research Centre)
Lieven M.K. Vandersypen (TU Delft - QCD/Vandersypen Lab, TU Delft - Applied Sciences, Kavli institute of nanoscience Delft, TU Delft - QuTech Advanced Research Centre)
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Abstract
Recent advances in coherent spin shuttling have made sparse semiconductor spin-qubit arrays an appealing solid-state platform to realize quantum processors1, 2, 3, 4, 5, 6–7. The dynamic and long-range connectivity enabled by shuttling is also essential for many quantum error-correction schemes8, 9–10. Here we demonstrate a silicon spin-qubit device comprising a shuttling bus for coherently transporting qubits that can interact at four isolated locations that we call bus stops. We dynamically populate the array and tune all single- and two-qubit operations using shuttling and quantum non-demolition spin measurements, without access to charge sensing in most of the device. We achieve universal control of the effective five-qubit processor and select the connectivity required to form a surface-code stabilizer plaquette that supports X- and Z-type parity checks up to weight four. We use the parity checks to generate multi-qubit entanglement between all qubit combinations in the array and report the genuine entanglement of a five-qubit Greenberger–Horne–Zeilinger state, constituting one of the largest such states constructed with gate-defined semiconductor spins. The protocols developed here lay the groundwork for modular calibration and operation of sparse spin-qubit arrays, and we highlight the feasibility of near-term quantum error-correction experiments with mobile spin qubits.
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