A Low-Power Oscillatory Feature Extraction Unit for Implantable Neural Interfaces
H. Yassin (TU Delft - Bio-Electronics, Aswan University)
A. Akhoundi (TU Delft - Bio-Electronics)
El Sayed Hasaneen (Aswan University)
Dante G Muratore (TU Delft - Bio-Electronics)
More Info
expand_more
Other than for strictly personal use, it is not permitted to download, forward or distribute the text or part of it, without the consent of the author(s) and/or copyright holder(s), unless the work is under an open content license such as Creative Commons.
Abstract
Power and area efficient on-chip feature extraction is needed for future closed-loop neural interfaces. This paper presents a feature extraction unit for neural oscillatory synchrony that bypasses the phase extraction step to reduce hardware complexity. Instead, the sine and cosine of the phase are directly approximated from the real and imaginary components of the signal to calculate the phase-amplitude coupling (PAC) and phase locking value (PLV). The synthesized design achieves state-of-the-art performances at 43 nW/channel and 0.006 mm2, while maintaining sufficient accuracy for seizure detection in epileptic patients.