A 115.1 TOPS/W, 12.1 TOPS/mm2Computation-in-Memory using Ring-Oscillator based ADC for Edge AI

Conference Paper (2023)
Author(s)

Abhairaj Singh (TU Delft - Computer Engineering)

R. Bishnoi (TU Delft - Computer Engineering)

A Kaichouhi (TU Delft - Support Quantum Engineering)

S.S. Diware (TU Delft - Computer Engineering)

R.V. Joshi (TU Delft - Computer Engineering, IBM Thomas J. Watson Research Centre)

S. Hamdioui (TU Delft - Quantum & Computer Engineering)

Research Group
Computer Engineering
Copyright
© 2023 A. Singh, R.K. Bishnoi, A. Kaichouhi, S.S. Diware, R.V. Joshi, S. Hamdioui
DOI related publication
https://doi.org/10.1109/AICAS57966.2023.10168647
More Info
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Publication Year
2023
Language
English
Copyright
© 2023 A. Singh, R.K. Bishnoi, A. Kaichouhi, S.S. Diware, R.V. Joshi, S. Hamdioui
Research Group
Computer Engineering
Bibliographical Note
Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public. @en
ISBN (electronic)
9798350332674
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Abstract

Analog computation-in-memory (CIM) architecture alleviates massive data movement between the memory and the processor, thus promising great prospects to accelerate certain computational tasks in an energy-efficient manner. However, data converters involved in these architectures typically achieve the required computing accuracy at the expense of high area and energy footprint which can potentially determine CIM candidacy for low-power and compact edge-AI devices. In this work, we present a memory-periphery co-design to perform accurate A/D conversions of analog matrix-vector-multiplication (MVM) outputs. Here, we introduce a scheme where select-lines and bit-lines in the memory are virtually fixed to improve conversion accuracy and aid a ring-oscillator-based A/D conversion, equipped with component sharing and inter-matching of the reference blocks. In addition, we deploy a self-timed technique to further ensure high robustness addressing global design and cycle-to-cycle variations. Based on measurement results of a 4Kb CIM chip prototype equipped with TSMC 40nm, a relative accuracy of up to 99.71% is achieved with an energy efficiency of 115.1 TOPS/W and computational density of 12.1 TOPS/mm2 for the MNIST dataset. Thus, an improvement of up to 11.3X and 7.5X compared to the state-of-the-art, respectively.

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