A DPLL-Based Phase Modulator Achieving -46dB EVM with A Fast Two-Step DCO Nonlinearity Calibration and Non-Uniform Clock Compensation

Conference Paper (2022)
Author(s)

Z. Gao (TU Delft - Electronics)

Martin Fritz (Sony Europe B.V.)

J. He (TU Delft - Electronics)

Gerd Spalink (Sony Europe B.V.)

Robert B. Staszewski (TU Delft - Electronics, University College Dublin)

M.S. Alavi (TU Delft - Electronics)

M. Babaie (TU Delft - Electronics)

Research Group
Electronics
Copyright
© 2022 Z. Gao, Martin Fritz, J. He, Gerd Spalink, R.B. Staszewski, S.M. Alavi, M. Babaie
DOI related publication
https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830398
More Info
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Publication Year
2022
Language
English
Copyright
© 2022 Z. Gao, Martin Fritz, J. He, Gerd Spalink, R.B. Staszewski, S.M. Alavi, M. Babaie
Research Group
Electronics
Bibliographical Note
Green Open Access added to TU Delft Institutional Repository 'You share, we take care!' - Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.@en
Pages (from-to)
14-15
ISBN (electronic)
9781665497725
Reuse Rights

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Abstract

We present a broadband digital PLL (DPLL)-based phase modulator supporting wide frequency modulation (FM) bandwidth (BW). It compensates for the EVM degradation due to the non-uniform period of the retimed updating clock and shortens the nonlinearity calibration time of the digitally controlled oscillator (DCO) with a phase-domain digital pre-distortion (DPD) and an encoding-assisted (EA)-LMS calibration. While generating a 10MHz 64-PSK signal, the prototype can achieve -46dB EVM with less than one-tenth of the calibration samples (time) required by the prior art.

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