Thermomechanical Oriented Reliability Enhancement of Si MOSFET Panel-Level Packaging Fusing Ant Colony Optimization With Backpropagation Neural Network

Considerable advancements in power semiconductor devices have resulted in such devices being increasingly adopted in applications of energy generation, conversion, and transmission. Hence, we proposed a fan-out panel-level packaging (FOPLP) design for 30-V Si-based metal-oxide-semiconductor field-effect transistor (MOSFET). To achieve...

A Thin and Low-Inductance 1200 V SiC MOSFET Fan-Out Panel-Level Packaging With Thermal Cycling Reliability Evaluation

SiC MOSFET is mainly characterized by the higher electric breakdown field, higher thermal conductivity, and lower switching loss enabling high breakdown voltage, high-temperature operation, and high switching frequency. However, their performances are considerably limited by the high parasitic inductance and poor heat dissipation capabilities...