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Surya Nagarajan

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Today's von Neumann computing systems are facing major challenges making them not suitable for evolving ultralow power (e.g., edge computing) applications. Therefore, alternative architectures that make use of post-CMOS devices are under investigation. One of these architectures is computation-in-memory (CIM) based on memristive devices; it performs (parallel) computing within the memory core, which prevents data-movement and results in low energy consumption, at the cost of some modification in memory design. Hence, a CIM die can work either in memory configuration or in computation configuration. One implementation of this architecture is based on Scouting logic; it allows the execution of logic operations within the memory. This paper discusses fault modeling and testing of CIM architectures, applied to a Scouting logic-based architecture. It demonstrates that unique faults can occur in the CIM die while in the computation configuration, and that these faults cannot be detected by just testing the CIM die in the memory configuration, thus leading to test escapes. The paper demonstrates how an efficient test can be developed that detects all faults in both configurations. Moreover, it shows that testing the die in the computation configuration reduces the overall test time while improving the outgoing product quality. ...

The Challenges for Test and Reliability

Conference paper (2019) - A. Bosio, I. O'Connor, G.S. Rodrigues, F.K. Lima, E.I. Vatajelu, G. di Natale, L. Anghel, Surya Nagarajan, M.C.R. Fieback, S. Hamdioui
Today's computer architectures and semiconductor technologies are facing major challenges making them incapable to deliver the required features (such as computer efficiency) for emerging applications. Alternative architectures are being under investigation in order to continue deliver sustainable benefits for the foreseeable future society at affordable cost. These architectures are not only changing the traditional computing paradigm (e.g., in terms of programming models, compilers, circuit design), but also setting up new challenges and directions on the way these architectures should be tested to guarantee the required quality and reliability levels. This paper highlights the major open questions regarding test and reliability of three emerging computing paradigms being approximate computing, computation-in-memory and neuromorphic computing. ...