In this article, we develop in parallel two fabrication methods for copper (Cu) electroplated contacts suitable for either silicon nitride or transparent conductive oxide antireflective coatings. We employ alternative seed layers, such as evaporated Ag or Ti, and optimize the Ti-Cu or Ag-Cu contacts with respect to uniformity of plating and aspect ratio of the final plated grid. Moreover, we test plating/deplating sequence instead of a direct current plating or the SiO ₂ layer approach to solve undesired plating outside the designed contact openings. The main objective of this paper is to explore the physical limit of this contact formation technology keeping the process compatible with industrial needs. In addition, we employ the optimized Cu-plating contacts in three different front/back-contacted crystalline silicon solar cells architectures: 1) silicon heterojunction solar cell with hydrogenated nanocrystalline silicon oxide as doped layers, 2) thin SiO ₂/doped poly-Si-poly-Si solar cell, and 3) hybrid solar cell endowed with rear thin SiO ₂/poly-Si contact and front heterojunction contact. To investigate the metallization quality, we compare fabricated devices to reference ones obtained with standard front metallization (Ag screen printing and Al evaporation). We observe a relatively small drop in V _OC by 5 to 10 mV by using Cu-plating front grid, whereas fill factor was improved for solar cells with Cu-plated front contact if compared with evaporated Al.

In this work, we develop SiO_x/poly-Si carrier-selective contacts grown by low-pressure chemical vapor deposition and boron or phosphorus doped by ion implantation. We investigate their passivation properties on symmetric structures while varying the thickness of poly-Si in a wide range (20-250 nm). Dose and energy of implantation as well as temperature and time of annealing were optimized, achieving implied open-circuit voltage well above 700 mV for electron-selective contacts regardless the poly-Si layer thickness. In case of hole-selective contacts, the passivation quality decreases by thinning the poly-Si layer. For both poly-Si doping types, forming gas annealing helps to augment the passivation quality. The optimized doped poly-Si layers are then implemented in c-Si solar cells featuring SiO₂/poly-Si contacts with different polarities on both front and rear sides in a lean manufacturing process free from transparent conductive oxide (TCO). At cell level, open-circuit voltage degrades when thinner p-type poly-Si layer is employed, while a consistent gain in short circuit current is measured when front poly-Si thickness is thinned down from 250 to 35 nm (up to +4 mA/cm²). We circumvent this limitation by decoupling front and rear layer thickness obtaining, on one hand, reasonably high current (J_SC-EQE = 38.2 mA/cm²) and, on the other hand, relatively high V_OC of approximately 690 mV. The best TCO-free device using Ti-seeded Cu-plated front contact exhibits a fill factor of 75.2% and conversion efficiency of 19.6%.