This paper presents an eddy-current sensor (ECS) interface intended for sub-nanometer (sub-nm) displacement sensing in hi-tech applications. The interface employs a 126-MHz excitation frequency to mitigate the skin effect, and achieve high resolution and stability. An efficient on-chip sensor offset compensation scheme is introduced which removes sensor-offset proportional to the standoff distance. To assist in the ratiometric suppression of noise and drift of the excitation oscillator, the ECS interface consists of a highly linear amplitude demodulation scheme that employs passive capacitors for voltage-to-current (V2I) conversion. Using a printed circuit board-based pseudo-differential ECS, stability tests were performed which demonstrated a thermal drift of <7.3 nm/°C and long-term drift of only 29.5 nm over a period of 60 h. The interface achieves an effective noise floor of 13.4 pm Hz which corresponds to a displacement resolution of 0.6 nm in a 2-kHz noise bandwidth. The ECS interface is fabricated in TSMC 0.18- μm CMOS technology and dissipates only 19.8 mW from a 1.8-V supply.

The major limitations of eddy-current displacement sensors, such as low measurement sensitivity and low stability, can be mitigated by using low-inductance flat coils in combination with a ratiometric measurement and a high excitation frequency, thus making eddy-current sensors of interest for high-precision applications. For the ratiometric measurement, the sensing coil is used in combination with a constant inductance reference coil, which are magnetically isolated from each other by a shield. In this paper, the implications of omitting the shield are studied. It is shown that a shieldless design brings several advantages related to sensitivity, compactness and manufacturability.

State-of-the-art industrial Eddy-Current Displacement Sensors (ECDSs) are typically not suitable for use in high-precision applications due to their low resolution and poor stability. By using a smaller, flat sensing coil, a reference coil, a dedicated readout chip and by operating at much higher excitation frequency a higher measurement sensitivity and better mechanical and thermal stability can be achieved. To use the sensor in industrial applications, the chip and the coils must be integrated in a small package. This paper presents a probe design for a high-precision ECDS, aiming at compactness and low thermal sensitivity. In this design, the sensing coil and the reference coil are closely spaced to minimise thermal gradients. The coils can, together with intermediate shielding and capacitive tilt electrodes, be integrated into a single stack only 2 mm thick and 12 mm in diameter, which can be realised on a multilayer PCB. Thermomechanical modelling shows that placing the readout chip on a separate PCB leads to significantly decreased self-heating compared to placement directly on the stack. Experiments show that the inductance behaviour of the realised stack is similar to that of the model.

Displacement sensing with sub-nanometer resolution is required in advanced metrology and high-tech industry, e.g., to measure the lens position in wafer scanners. Linear encoders and interferometers are often used for this purpose, but they are bulky and costly. Capacitive sensors [1], though compact, are sensitive to environment and require electrical access to the target. Eddy-current sensors (ECSs) do not have these disadvantages, but their resolution and stability are limited by the skin-effect [2-5]. For sub-nm measurements, this can be alleviated by using excitation frequencies >100MHz. This calls for stable flat sensing coils (to minimize parasitics) in close proximity to the ECS interface, whose power dissipation must then be low enough to avoid self-heating and displacement errors due to thermal expansion [2,6].