SRAM Physical Unclonable Functions (PUFs) serve as security primitives and can be used to generate random and unique identifiers, which makes their reliability crucial. The reliability is affected by aging and in particular Bias Temperature Instability (BTI), which in turn affects the PUF responses over time typically measured by the Hamming distance (HD). In this work, we model the BTI impact on SRAM PUF reliability for 14 nm FinFET technology and evaluate the reliability of SRAM PUFs using both simulation and silicon measurements. Additionally, we explore the effectiveness of an anti-aging technique on SRAM PUF reliability. Our simulation model and results (which include process variation and circuit noise) are validated with silicon measurements. From them we conclude the following: 1) there exists a direct correlation between BTI and the Hamming distance of an SRAM PUF, where its reliability decreases with 6% over a 6-month period due to aging, and 2) applying anti-aging patterns improves the Hamming distance and hence the reliability with 3% over a 6-month period.

SRAM Physical Unclonable Functions (PUFs) are one of the popular forms of PUFs that can be used to generate unique identifiers and randomness for security purposes. Hence, their resilience to attacks is crucial. The probability of attacks increases when the SRAM PUF start-up values follow a predictable pattern which we refer to as bias. In this paper, we investigate the parameters impacting the SRAM PUF bias of advanced FinFET SRAM designs. In particular, we analyze the bias with respect to temperature, mismatches in the power supply network, and ramp-up time. We also consider process variation, circuit noise, and SRAM layout in our analysis. Our simulations results match with the silicon measurements. From the experiments we conclude that (i) the SRAM layout and in particular the power supply network can lead to a bias, (ii) this bias increases with temperature, and (iii) this bias increases when the supply ramp-up time decreases.