The advancement of DC systems, especially in transportation applications, hinges on the development of effective protection mechanisms. Robust protection systems are crucial for enabling the widespread adoption of DC technologies in important transport modes, offering both operational and economic benefits. This paper introduces a high-speed solid-state circuit breaker designed for enhancing the protection of general DC systems. The upgraded breaker integrates the functionality of a latching current limiter, designed to minimize modifications to existing technologies. A custom gate driver and controller are developed and experimentally validated to support the circuit breaker. A scaled solid-state circuit breaker prototype is tested under various operational conditions to evaluate its performance. The breaker's behavior is simulated in SPICE to guide the experimental validation on a referential DC system. The results demonstrate high performance, with a clearing time close to 200ns, effectively reducing system stress during short circuits. The current limiter functionality prevents unnecessary tripping during temporary overcurrents, keeping the current within safe parameters. The innovative gate driver simplifies the implementation of the latching current limiter, offering a practical and scalable solution. This work represents a significant step forward in DC protection technology, promoting the adoption of DC systems in transportation applications and beyond, by addressing critical protection challenges.

This paper presents a desaturation-based technique for short-circuit protection in quasi-two-level converters. The proposed design enables a cost-effective implementation of this protection scheme in a flying capacitor multilevel converter operating as a quasi-two-level converter, requiring only two detection circuits for n series-connected switches. Detailed design guidelines for the protection circuit are provided, along with simulations that illustrate its operational boundaries and experimental verification of the proposed scheme.

The development of DC protection systems is an enabler of widespread adoption of DC microgrids. This paper introduces a three-level gate driver that provides the latching current limiter functionality in a solid-state circuit breaker with unidirectional protection. The proposed gate driver combines the output port description of a well-known, enabled gate driver with a soft turn-off network. The corresponding circuit can be adapted to well-established SSCBs, requiring few modifications which could allow for quick development. The concept, simulation, implementation and experimental validation of the gate driver are in the scope of the paper. The gate driver is implemented and tested in a solid-state circuit breaker prototype, showing the potential to develop further DC protection devices.

This article proposes a new configuration of a modular multilevel converter (MMC) and a Marx generator to generate fast-rising impulse waveforms. This new configuration improves the capabilities of the MMC-based high voltage arbitrary wave shape generator to generate fast-rising impulse since the MMC topology faces many inherent limitations. Similar to the conventional superimposed circuit of the ac transformer or dc rectifier circuit with the Marx generator, three hybrid circuits of MMC and the Marx generator are introduced, where the most optimal choice is made considering the practical aspects of testing, such as the size, cost, and preparation time. Then, a detailed analytical study is performed on the Marx generator circuit and the MMC circuit, and both circuits are coupled together to deliver a complete guideline on choosing various system parameters when the impulse wave shape and the load capacitor are given. The concept of this new hybrid configuration is demonstrated with a scaled-down prototype where the impulse with a rise time of 1 μs is superimposed on different arbitrary wave shapes. Similarly, the MATLAB-Simulink simulation model validates the proposed configuration for a 200, k V dc link voltage and 67 submodules with the desired impulse performance.

The protection of DC systems in mobility applications, such as land transport, aircraft, and shipping, presents significant challenges due to the need for high power density equipment in confined spaces. This paper focuses on DC systems on board ships, for which diverse applications require different power levels, architectures, and protection strategies. Existing protection frameworks and regulations are often inadequate or outdated for the field, leading to certification issues and insufficient fault analysis. This research proposes a use case-based categorization of short circuit currents for primary systems. A reference scenario is created using a simulation model of a 5 MW system in a superyacht to provide a short circuit inventory. The study proposes three contributions. A comprehensive fault inventory, a qualitative categorization, and relevant recommendations for power converter design. The research highlights the importance of fault categorization in understanding the impact of various short circuits on shipboard DC systems. The study emphasizes the importance of the evolution of materials and power converters in developing efficient protection technologies for ships. This work addresses some fundamental gaps in shipboard DC systems, providing a foundation for improved protection strategies and regulations, ultimately contributing to the advancement of protection of shipboard DC systems.

This paper proposes an integrated gate driver featuring soft turn-off and current limiting for a solid-state circuit breaker in primary shipboard DC systems. The added functionalities allow solid-state circuit breakers to mitigate part of the voltage resonances caused by a hard turn-off, and to reduce unnecessary tripping during overloading events. The proposed design is based on well-known DC protection strategies, which are enhanced by the custom gate driver, simulated in SPICE software. The paper shows that the proposed strategy effectively attenuates the adverse effects of the hard turn-off present in popular off-the-shelf devices, while effectively breaking the fault current. The low propagation delay of the selected components facilitates the rapid break of the current, reaching approximately 69A peak. In addition, the latch current limiter prevents the feeder from overloading, creating a voltage drop of 51% for tens of nanoseconds. The results are promising in motivating future prototyping of the design in an attempt to accelerate the acceptance of shipboard DC systems.

This article presents an analysis, multiobjective design, and benchmark of three modified 3 phase shift full-bridge (PSFB) converters that are well-suited for electric vehicle (EV) battery charging applications, covering both typical battery voltage classes (400 and 800 V). These three modified PSFB converters, denoted as the t-PSFB, r-PSFB, and i-PSFB converters, have the ability to reconfigure and provide better efficiency performance in the wide voltage range necessary for public EV battery charging applications. In this article, the characteristics and design considerations of these reconfigurable PSFB converters are discussed in detail. A multiobjective converter design process is proposed to optimize the average efficiency, normalized cost, and power density of the magnetic components and heat sinks. This design process employs the correlations between the cost and performance indexes of the key components derived based on open and accessible components' data to estimate the design objectives. In this way, the design process is not constrained by certain component choices, making it easier to identify the most advantageous design. A benchmark study is conducted among the reconfigurable PSFB topologies and the conventional PSFB circuit using the proposed multiobjective design process. To validate the analysis, a close-to-Pareto-front 11-kW, 45-kHz r-PSFB converter prototype with 640-840-V input voltage and 250-1000-V output voltage ranges is developed and tested.

In recent years, significant research and adoption of periodic variable-switching frequency pulsewidth modulation (PWM) (P-VSFPWM) have been observed in ac/dc voltage source converters (VSCs). This technique aims to reduce ripple in ac inductor current and dc capacitor voltage, suppress injected current harmonic amplitudes for electromagnetic compatibility (EMC) compliance, and minimize switching losses. However, the presence of overlapped harmonic spectra from different switching harmonic bands can lead to heightened harmonic magnitudes due to the wide-frequency variation, necessitating additional filtering measures. Surprisingly, there is notable absence of harmonic spectra analysis under P-VSFPWM, despite the growing concern over supraharmonics (2-150 kHz) emission injected to the grid from the electric-vehicle (EV) chargers. To address this gap, this article proposes the interleaved P-VSFPWM to mitigate harmonics overlap without deviating from the intended purpose of P-VSFPWM. A fast-acquisition supraharmonics model under arbitrary P-VSFPWM has been proposed based on vectorization, facilitating the subsequent filter design process. Furthermore, this study identifies the optimal P-VSFPWM profile with minimal required filtering inductance based on the spectra analysis. These findings are verified by PLECS simulations and experimental results.

High efficiency can be achieved in grid-connected converters by implementing a zero-voltage switching mechanism, such as the integrated triangular current mode (iTCM) modulation, which reduces the switching losses in the semiconductors. The iTCM can be readily adapted to a three-phase three-wire voltage-source converter (VSC) with the help of virtual ground (VG), which decouples the operation of three-phase switching cells. However, conventional methods of VG have all the zero-sequence currents flowing through the dc-link capacitors, resulting in an increase in the rms current, hence, extra loss for those passive components. This article, thus, introduces a capacitor-split VG topology that can relieve this issue by excluding the dc-link capacitors from the circulating path of the main zero-sequence currents, helping to reduce current stress for the dc-link capacitors. This topology is characterized by its filter capacitors being split into two halves and connected to the top and the bottom dc rails, respectively. Herein, the working principles of the proposed iTCM-operated three-phase three-wire VSC are comprehensively explained, and a detailed design guideline for the LC branch and LCL filter is offered. Analytical models for component stresses and the reverse current waveform have been developed and corroborated through PLECS simulations. A 3-kW, heatsink-less VSC system was constructed and tested, confirming both the system's effective functionality and the enhanced power efficiency of the proposed capacitor-split VG connection. Therein, the studied system demonstrated a significant efficiency improvement, ranging from 0.51% to 2% across the entire operating power spectrum, as compared to the conventional VG connection in iTCM-operated VSCs.

This article analyzes, designs, and tests a reconfigurable phase shift full-bridge (r-PSFB) isolated dc/dc converter well suited for a wide voltage operating range. By controlling the auxiliary switches, a series or parallel connection can be realized on the secondary side of the converter. As a result, the r-PSFB converter can operate in an extremely wide voltage range without compromising the system efficiency. In this article, the characteristics of the r-PSFB converter and its design considerations are discussed in detail. An 11-kW r-PSFB converter prototype with 640-840-V input voltage and 250-1000-V output voltage ranges is developed and tested to validate the analysis and efficiency of the designed converter. A comparative study against a conventional PSFB converter is conducted for benchmark purposes to prove the advantages of the studied r-PSFB converter.

This paper proposes a solution to the circuit topology of heavy-duty electric vehicle (HDEV) chargers. In light of the original hybrid rectifier, a new unidirectional Input-Parallel-Output-Series (IPOS) three-phase hybrid rectifier is proposed and analyzed. The IPOS topology is advantageous at ultra-high power rating to interface the next-generation HDEV batteries which require a high and wide output voltage range of 800~1500 V with available 600/1200V commercial semiconductors. Moreover, the proposed topology is efficient, cost-effective, and scalable with the grid input current harmonic components in compliance with the IEEE-519 standard. The benefits of the IPOS topology are supported by circuit derivation, control strategy, analytical modelling, simulation, and experimental verification.

This paper presents the study of a 100kW electric vehicle (EV) fast charger based on a 12-pulse rectifier cascaded with two buck-type DC-DC converters. The proposed circuit operates with a triangular current shaping method which considerably improves the current harmonics performance of the system. The studied circuit is particularly suited for high power battery charging, being relatively simple to operate, requiring a low active semiconductor count (only two active switches), and because it employs circuit technologies well-established in the high power market. Above all, this EV fast charger meets the requirements of isolation, high efficiency, high output voltage and good power quality (low THD and unity power factor). This paper describes in detail the analytical modeling of the studied circuit, including the current harmonic input filter design which meets the grid standard requirement, and the loss modeling of the semiconductors and passive elements. The modeling and simulation results of the proposed 100 kW system are presented and analyzed.