RS

R.M. Seepers

Authored

11 records found

The Inter-Pulse-Interval (IPI) of heart beats has previously been suggested for security in mobile health (mHealth) applications. In IPI-based security, secure communication is facilitated through a security key derived from the time difference between heart beats. However, there ...
In heart-beat-based security, a security key is derived from the time difference between consecutive heart beats (the inter-pulse interval, IPI), which may, subsequently, be used to enable secure communication. While heart-beat-based security holds promise in mobile health (mHeal ...
Recent work on wireless Implantable Medical Devices (IMDs) has revealed the need for secure communication in order to prevent data theft and implant abuse by malicious attackers. However, security should not be provided at the cost of patient safety and an IMD should, thus, remai ...
A promising alternative for treating absence seizures has emerged through closed-loop neurostimulation, which utilizes a wearable or implantable device to detect and subsequently suppress epileptic seizures. Such devices should detect seizures fast and with high accuracy, while r ...
The time interval between consecutive heartbeats (interpulse interval, IPI) has previously been suggested for securing mobile-health solutions. This time interval is known to contain a degree of randomness, permitting the generation of a time- and person-specific identifier. It i ...
Experimental devices aiming at real-time detection and suppression of epileptic-seizure events in live subjects already exist. However, to guarantee high detection accuracy, existing approaches employ high-accuracy detection filters that overlook the incurred energy costs, thus l ...
The cardiac interpulse interval (IPI) has recently been proposed tofacilitate key exchange for implantable medical devices (IMDs) using apatient's own heartbeats as a source of trust. While this form of key exchangeholds promise for IMD security, its feasibility is not fully unde ...
In this paper, we describe the design and implementation of a new fault-tolerant RISC-processor architecture suitable for a design framework targeting biomedical implants. The design targets both soft and hard faults and is original in efficiently combining as well as enhancing c ...