This article presents an energy-efficient dual- RC frequency reference intended for wireless sensor nodes. It consists of a digital frequency-locked loop (FLL) in which the frequency of a digitally controlled oscillator (DCO) is locked to a temperature-independent phase shift derived from two different RC poly-phase filters (PPFs). Phase shifts with complementary temperature coefficients (TCs) are generated by using PPFs made from different resistor types (p-poly and silicided p-poly). The phase shift of each filter is determined by a zero-crossing (ZC) detector and then digitized by a digital phase-domain ΔΣ modulator ( Φ - ΔΣM ). The results are then combined in the digital domain via fixed polynomials to produce a temperature-independent phase shift. This highly digital architecture enables the use of a sub-1-V supply voltage and enhances energy and area efficiency. The 28-MHz frequency reference occupies 0.06 mm2 in a 65-nm CMOS process. It achieves a period jitter of 7 ps ( 1σ ) and draws 142 μW from a 0.9-V supply, which corresponds to an energy consumption of 5 pJ/cycle. Furthermore, it achieves ±200 ppm inaccuracy from −40∘C to 85 ∘C after a two-point trim.

@en

Wireless sensor nodes in battery-powered internet-of-things (loT) applications require a stable on-chip frequency reference with low energy (<10 pJ / cycle) and high frequency stability (below ±300ppm). CMOS RC frequency references are promising due to their low-cost integration and high energy efficiency [1] –[5]. Conventional RC references, however, achieve only moderate accuracy (a few %) due to the large temperature coefficient (TC) of on-chip resistors [3]. First-order TC compensation can be achieved by combining resistors with complementary TCs [1], [2]. Although this is energy efficient (<6 pJ / cycle), it only partially compensates for the resistors’ high-order TCs, limiting the resulting accuracy to about ±500 ppm. Better accuracy (±100 ppm [4]) can be achieved by using the output of a digital temperature sensor (TS) to perform a polynomial correction of the phase-shift (μp,T) of an RC filter (Fig. 31.2.1). Alternatively, the phase-shifts (μp. and μN) of two RC filters with complementary TCs can be linearized (Tp. and T N ) and combined in the digital domain. Such dual-RC frequency references can also achieve good accuracy (±200 ppm [5]). However, both architectures employ an analog phase-domain ΔΣ modulator (Φ−ΔΣM) for each RC filter, which consumes significant energy (25pJ/cycle [4] and 107pJ/ cycle [5]) and area (0.3mm2[4]. and 1.65mm2[5]).@en

This letter describes a compact resistor-based temperature sensor intended for the thermal monitoring of microprocessors and DRAMs. It consists of an RC poly phase filter (PPF) that is read out by a frequency-locked loop (FLL) based on a dual zero-crossing (ZC) detection scheme. The sensor, fabricated in 65-nm CMOS, occupies 5800 μ m2 and achieves moderate accuracy [±1.2 °C (3 σ)] over a wide temperature range (-50 °C to 105 °C) after a one-point trim. This is 2× better than the previous compact resistor-based sensors. Operating from 0.85 to 1.3-V supplies, it consumes 32.5-μ A and achieves 2.8-mK resolution in a 1-ms conversion time, which corresponds to a resolution FoM of 0.26 pJ K2.

@en

This letter describes a compact resistor-based temperature sensor intended for the thermal monitoring of microprocessors and DRAMs. It consists of an RC poly phase filter (PPF) that is read out by a frequency-locked loop (FLL) based on a dual zero-crossing (ZC) detection scheme. The sensor,fabricated in 65-nm CMOS,occupies 5800 μm2 and achieves moderate accuracy [±1.2 °C (3σ)] over a wide temperature range (-50 °C to 105 °C) after a one-point trim. This is 2× better than the previous compact resistor-based sensors. Operating from 0.85 to 1.3-V supplies,it consumes 32.5-μA and achieves 2.8-mK resolution in a 1-ms conversion time,which corresponds to a resolution FoM of 0.26 pJ•K2.@en

This paper presents a compact resistor-based CMOS temperature sensor intended for dense thermal monitoring. It is based on an RC poly-phase filter (PPF), whose temperature-dependent phase shift is read out by a frequency-locked loop (FLL). The PPF's phase shift is determined by a zero-crossing (ZC) detector, allowing the rest of the FLL to be realized in an area-efficient manner. Implemented in a 65-nm CMOS technology, the sensor occupies only 7000 μm². It can operate from supply voltages as low as 0.85 V and consumes 68 μW. A sensor based on a PPF made from silicided p-poly resistors and metal-insulator-metal (MIM) capacitors achieves an inaccuracy of ±0.12 °C (3σ) from -40 °C to 85 °C and a resolution of 2.5 mK (rms) in a 1-ms conversion time. This corresponds to a resolution figure-of-merit (FoM) of 0.43 pJ·K².

@en

In microprocessors and DRAMs, on-chip temperature sensors are essential components, ensuring reliability by monitoring thermal gradients and hot spots. Such sensors must be as small as possible, since multiple sensors are required for dense thermal monitoring. However, conventional BJT-based temperature sensors are not compatible with the sub-1V supply of advanced processes. Subthreshold MOSFETs can operate from lower supplies, but at high temperatures their performance is limited by leakage [1,2]. Thermal diffusivity (TD) sensors achieve sub-1V operation and small area with moderate accuracy, but require milliwatts of power [3]. Recently, resistor-based sensors based on RC WienBridge (WB) filters have realized high resolution and energy efficiency [4,5]. Fundamentally, they are robust to process and supply-voltage scaling. However, their readout circuitry has been based on continuous-time (CT) ΔΣ ADCs or frequency-locked loops (FLLs), which require precision analog circuits and occupy considerable area (>0.7mm ² ).

@en