12 records found
1
On efficiency of transport triggered architectures in DSP applications
Code generation and optimization for embedded processors
Trading efficiency for energy in a texture cache architecture
Global variable promotion: using registers to reduce cache power dissipation
A low-cost, power-efficient texture cache architecture
Code positioning for VLIW architectures
Link-time effective whole-program optimizations
The impact of code positioning on ILP scheduling
Global program optimization: register allocation of static scalar objects
A linker for effective whole-program optimizations
Floating point to fixed point conversion of C code
A programmable ANSI C transformation engine
