Rob Bootsman
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This thesis presents the design of a bidirectional low-dropout voltage regulator(LDO) for CMOS drivers in a 3.5 GHz digital transmitter (DTX). A tightly regulated 0.9V mid-rail supply is required to ensure short rise/fall times and maintain Adjacent channel leakage ratio(ACLR) performance. Regulator specifications were derived by porting the LDMOS driver to a 22 nm FDSOI process and characterizing its current demand across PVT corners, requiring up to 2.9 mA sourcing and 1.9 mA sinking with < ±1.5 mV voltage deviation. A complementary push–pull architecture with a folded-cascode error amplifier, super-source-follower buffers, and differentiator-based compensation was implemented to achieve low output impedance without excessive on-chip capacitance. Simulations confirm < 573 μA quiescent current, phase margin > 45°, and acceptable ACLR performance, validating the design for integration in CMOS/LDMOS DTX systems.
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This thesis presents the design of a bidirectional low-dropout voltage regulator(LDO) for CMOS drivers in a 3.5 GHz digital transmitter (DTX). A tightly regulated 0.9V mid-rail supply is required to ensure short rise/fall times and maintain Adjacent channel leakage ratio(ACLR) performance. Regulator specifications were derived by porting the LDMOS driver to a 22 nm FDSOI process and characterizing its current demand across PVT corners, requiring up to 2.9 mA sourcing and 1.9 mA sinking with < ±1.5 mV voltage deviation. A complementary push–pull architecture with a folded-cascode error amplifier, super-source-follower buffers, and differentiator-based compensation was implemented to achieve low output impedance without excessive on-chip capacitance. Simulations confirm < 573 μA quiescent current, phase margin > 45°, and acceptable ACLR performance, validating the design for integration in CMOS/LDMOS DTX systems.
Many applications require wide bandwidth transmitters, but unfortunately, they usually have way less than 50% average drain efficiency for their modulated signals. This low efficiency is a significant drawback in all wireless applications, both for battery power devices and base stations. The Doherty radio frequency (RF) power amplifier architecture is widely used to enhance the average efficiency for modulated signals in base stations. Its popularity is due to its relatively cheap and simple hardware and its suitability to handle high-power wideband modulated signals. However, even Doherty amplifiers often have less than 50% average efficiency and are restricted in their RF bandwidth.
This thesis reviews recent research on the Doherty power amplifier (DPA) topology and discusses possible power and bandwidth efficiency improvements. In the second part of the thesis, another topology is introduced, which also provides Doherty-like behavior. That topology is called a Pseudo Doherty Load Modulated Balanced Amplifier (PD-LMBA). The performance of PD-LMBA is compared with “conventional” DPAs. Circuit design examples of DPA and PD-LMBA are given. The thesis concludes with a PD-LMBA prototype design, which appears to be very promising in its wideband performance. ...
This thesis reviews recent research on the Doherty power amplifier (DPA) topology and discusses possible power and bandwidth efficiency improvements. In the second part of the thesis, another topology is introduced, which also provides Doherty-like behavior. That topology is called a Pseudo Doherty Load Modulated Balanced Amplifier (PD-LMBA). The performance of PD-LMBA is compared with “conventional” DPAs. Circuit design examples of DPA and PD-LMBA are given. The thesis concludes with a PD-LMBA prototype design, which appears to be very promising in its wideband performance. ...
Many applications require wide bandwidth transmitters, but unfortunately, they usually have way less than 50% average drain efficiency for their modulated signals. This low efficiency is a significant drawback in all wireless applications, both for battery power devices and base stations. The Doherty radio frequency (RF) power amplifier architecture is widely used to enhance the average efficiency for modulated signals in base stations. Its popularity is due to its relatively cheap and simple hardware and its suitability to handle high-power wideband modulated signals. However, even Doherty amplifiers often have less than 50% average efficiency and are restricted in their RF bandwidth.
This thesis reviews recent research on the Doherty power amplifier (DPA) topology and discusses possible power and bandwidth efficiency improvements. In the second part of the thesis, another topology is introduced, which also provides Doherty-like behavior. That topology is called a Pseudo Doherty Load Modulated Balanced Amplifier (PD-LMBA). The performance of PD-LMBA is compared with “conventional” DPAs. Circuit design examples of DPA and PD-LMBA are given. The thesis concludes with a PD-LMBA prototype design, which appears to be very promising in its wideband performance.
This thesis reviews recent research on the Doherty power amplifier (DPA) topology and discusses possible power and bandwidth efficiency improvements. In the second part of the thesis, another topology is introduced, which also provides Doherty-like behavior. That topology is called a Pseudo Doherty Load Modulated Balanced Amplifier (PD-LMBA). The performance of PD-LMBA is compared with “conventional” DPAs. Circuit design examples of DPA and PD-LMBA are given. The thesis concludes with a PD-LMBA prototype design, which appears to be very promising in its wideband performance.