A sparse spin qubit array with integrated control electronics
J. M. Boter (Kavli institute of nanoscience Delft, TU Delft - QCD/Vandersypen Lab, TU Delft - QuTech Advanced Research Centre)
J. P. Dehollain (TU Delft - QCD/Vandersypen Lab, TU Delft - QuTech Advanced Research Centre, Kavli institute of nanoscience Delft)
J.P.G. van Dijk (TU Delft - OLD QCD/Charbon Lab, Kavli institute of nanoscience Delft, TU Delft - QuTech Advanced Research Centre)
T. Hensgens (TU Delft - QuTech Advanced Research Centre, TU Delft - QCD/Vandersypen Lab, Kavli institute of nanoscience Delft)
R. Versluis (TNO, TU Delft - QuTech Advanced Research Centre, TU Delft - BUS/General)
J. S. Clarke (Kavli institute of nanoscience Delft)
M. Veldhorst (TU Delft - QCD/Veldhorst Lab, TU Delft - QuTech Advanced Research Centre, Kavli institute of nanoscience Delft)
F. Sebastiano (TU Delft - (OLD)Applied Quantum Architectures, TU Delft - QuTech Advanced Research Centre)
L. M.K. Vandersypen (TU Delft - QN/Vandersypen Lab, TU Delft - QuTech Advanced Research Centre, Intel Corporation, TU Delft - QCD/Vandersypen Lab, Kavli institute of nanoscience Delft)
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Abstract
Current implementations of quantum computers suffer from large numbers of control lines per qubit, becoming unmanageable with system scale up. Here, we discuss a sparse spin-qubit architecture featuring integrated control electronics significantly reducing the off-chip wire count. This quantum-classical hardware integration closes the feasibility gap towards a CMOS quantum computer.