Quantum Inspire has taken important steps to enable quantum applications by developing a setting that allows the execution of hybrid algorithms. Currently, the setting uses a classical server (HPC node) co-located with the quantum computer for the high frequency coupling needed by hybrid algorithms. A fast task manager (dispatcher) has been developed to orchestrate the interaction between the server and the quantum computer. Although successful, the setting imposes a specific hybrid job-structure. This is most likely always going to be the case and we are currently discussing how to make sure this does not hamper the uptake of the setting. Furthermore, first steps have been taken towards the integration with the Dutch National High-Performance Computing (HPC) Center, hosted by SURF. As a first approach we have setup a setting consisting of two SLURM clusters, one in the HPC (C1) and the second (C2) co-located with Quantum Inspire API. Jobs are submitted from C1 to C2. Quantum Inspire can then schedule with C2 the jobs to the quantum computer. With this setting, we enable control from both SURF and Quantum Inspire on the jobs being executed. By using C1 for the jobs submission we remove the accounting burden from Quantum Inspire. By having C2 co-located with Quantum Inspire API, we make the setting more resilient towards network failures. This setting can be extended for other HPC centers to submit jobs to Quantum Inspire backends.

As part of the National Agenda for Quantum Technology, QuTech (TU Delft and TNO) has agreed to make quantum technology accessible to society and industry via its full-stack prototype: Quantum Inspire. This system includes two different types of programmable quantum chips: circuits made from superconducting materials (transmons), and circuits made from silicon-based materials that localize and control single-electron spins (spin qubits). Silicon-based spin qubits are a natural match to the semiconductor manufacturing community, and several industrial fabrication facilities are already producing spin-qubit chips. Here, we discuss our latest results in spin-qubit technology and highlight where the semiconducting community has opportunities to drive the field forward. Specifically, developments in the following areas would enable fabrication of more powerful spin-qubit based quantum computing devices: circuit design rules implementing cryogenic device physics models, high-fidelity gate patterning of low resistance or superconducting metals, gate-oxide defect mitigation in relevant materials, silicon-germanium heterostructure optimization, and accurate magnetic field generation from on-chip micromagnets.

One of the main bottlenecks in the pursuit of a large-scale-chip-based quantum computer is the large number of control signals needed to operate qubit systems. As system sizes scale up, the number of terminals required to connect to off-chip control electronics quickly becomes unmanageable. Here, we discuss a quantum-dot spin-qubit architecture that integrates on-chip control electronics, allowing for a significant reduction in the number of signal connections at the chip boundary. By arranging the qubits in a two-dimensional array with about 12μm pitch, we create space to implement locally integrated sample-and-hold circuits. This allows us to offset the inhomogeneities in the potential landscape across the array and to globally share the majority of the control signals for qubit operations. We make use of advanced circuit modeling software to go beyond conceptual drawings of the component layout, to assess the feasibility of the scheme through a concrete floor plan, including estimates of footprints for quantum and classical electronics, as well as routing of signal lines across the chip using different interconnect layers. We make use of local demultiplexing circuits to achieve an efficient signal-connection scaling, leading to a Rent's exponent as low as p=0.43. Furthermore, we use available data from state-of-the-art spin qubit and microelectronics technology development, as well as circuit models and simulations, to estimate the operation frequencies and power consumption of a million-qubit array. This work presents a complementary approach to previously proposed architectures, focusing on a feasible scheme to integrating quantum and classical hardware, and identifying remaining challenges for achieving full fault-tolerant quantum computation. It thereby significantly closes the gap towards a fully CMOS-compatible quantum computer implementation.

The mission of QuTech is to bring quantum technology to industry and society by translating fundamental scientific research into applied research. To this end we are developing Quantum Inspire (QI), a full-stack quantum computer prototype for future co-development and collaborative R&D in quantum computing. A prerelease of this prototype system is already offering the public cloud-based access to QuTech technologies such as a programmable quantum computer simulator (with up to 31 qubits) and tutorials and user background knowledge on quantum information science (www.quantum-inspire.com). Access to a programmable CMOS-compatible Silicon spin qubit-based quantum processor will be provided in the next deployment phase. The first generation of QI's quantum processors consists of a double quantum dot hosted in an in-house grown SiGe/²⁸Si/SiGe heterostructure, and defined with a single layer of Al gates. Here we give an overview of important aspects of the QI full-stack. We illustrate QI's modular system architecture and we will touch on parts of the manufacturing and electrical characterization of its first generation two spin qubit quantum processor unit. We close with a section on QI's qubit calibration framework. The definition of a single qubit Pauli X gate is chosen as concrete example of the matching of an experiment to a component of the circuit model for quantum computation.

The classic Rubik's Cube has 43,252,003,274,489,856,000 different states. You might well wonder how people are able to take a scrambled cube and bring it back to its original configuration, with just one color showing on each side. Some people are even able to do this blindfolded after viewing the scrambled cube once. Such feats are possible because there's a basic set of rules that always allow someone to restore the cube to its original state in 20 moves or less.

Current implementations of quantum computers suffer from large numbers of control lines per qubit, becoming unmanageable with system scale up. Here, we discuss a sparse spin-qubit architecture featuring integrated control electronics significantly reducing the off-chip wire count. This quantum-classical hardware integration closes the feasibility gap towards a CMOS quantum computer.

We present a scalable scheme for executing the error-correction cycle of a monolithic surface-code fabric composed of fast-flux-tunable transmon qubits with nearest-neighbor coupling. An eight-qubit unit cell forms the basis for repeating both the quantum hardware and coherent control, enabling spatial multiplexing. This control uses three fixed frequencies for all single-qubit gates and a unique frequency-detuning pattern for each qubit in the cell. By pipelining the interaction and readout steps of ancilla-based X- and Z-type stabilizer measurements, we can engineer detuning patterns that avoid all second-order transmon-transmon interactions except those exploited in controlled-phase gates, regardless of fabric size. Our scheme is applicable to defect-based and planar logical qubits, including lattice surgery.

In dark-field particle inspection, the limiting factor for sensitivity is the amount of background scatter due to substrate roughness. This scatter forms a speckle pattern and shows an intensity distribution with a long tail. To reduce false-positives to an acceptable level, a high detection threshold should be chosen such that the tail of the background distribution is avoided. We have modeled an optimized illumination mode, that reduces the variance in the background distribution. This illumination mode illuminates the substrate from multiple azimuth angles. We show that the speckle patterns generated by each azimuth angle can be independent from each other. Therefore by combining the angles, the variance of the background signal is reduced. We show that for the parameters of our inspection system the detection threshold can be reduced by a factor three, resulting in a lower detection limit that is 20% smaller in particle size. The change in the background scattering distribution was confirmed by experiments.

TNO has developed the Rapid Nano scanner to detect nanoparticles on EUVL mask blanks. This scanner was designed to be used in particle qualifications of EUV reticle handling equipment. In this paper we present an end-to-end model of the Rapid Nano detection process. All important design parameters concerning illumination, detection and noise are included in the model. The prediction from the model matches the performance that was experimentally determined (59 nm LSE). The model will be used to design and predict the performance of future generations of particle scanners.

In many industrial processes, particle contamination is becoming a major issue. Particle detachment from surfaces can be detrimental, e.g., during lithographic processing. During cleaning, however, detachment of particles is aimed for. However, until recently, only little was known on the mechanism of particle detachment due to flowing gasses. In high throughput applications, large gas velocities are likely to occur at certain locations in the system. It is important to test particle behavior experimentally under all conditions that may arise. Therefore, the aim of this study is to be able to predict the risk of particle detachment by modeling. For this purpose, particle-surface interaction is studied for micrometer-sized particles. Based on the particle Reynolds number, critical particle diameters were determined for which the flow-induced forces on the particles (drag and lift forces) are larger than the attractive forces between the particle and the surface (van der Waals force). Among the different possible particle motions (lift, sliding and rotation), particle rotation turns out to be the mechanism responsible for particle removal. A critical particle diameter was defined for which attractive and flow-induced forces are equal. Calculated values of the critical particle diameter agree with the experimental results within a few micrometers. This removal mechanism model can thus be used to calculate the cleaning efficiency of a flow, and for determining the probability of unwanted detachment of particles from surfaces in ultra-clean production or processing environments.

A new approach for performing numerical direct simulation Monte Carlo (DSMC) simulations on turbomolecular pumps in the free molecular and transitional flow regimes is described. The chosen approach is to use surfaces that move relative to the grid to model the effect of rotors and stators on a gas flow. The current article describes the method and compares the results to experimental and theoretical data by Sawada [Bull. JSME 22, 362 (1979)]. The agreement between our results and Sawada's results are excellent.