In the version of this Letter originally published, the second, third and fourth exponential terms in equation (3) were incorrect; the corrected equation is shown below. (Formula presented.). The correct equation was used for data analysis. The online versions have been amended.@en

As part of the National Agenda for Quantum Technology, QuTech (TU Delft and TNO) has agreed to make quantum technology accessible to society and industry via its full-stack prototype: Quantum Inspire. This system includes two different types of programmable quantum chips: circuits made from superconducting materials (transmons), and circuits made from silicon-based materials that localize and control single-electron spins (spin qubits). Silicon-based spin qubits are a natural match to the semiconductor manufacturing community, and several industrial fabrication facilities are already producing spin-qubit chips. Here, we discuss our latest results in spin-qubit technology and highlight where the semiconducting community has opportunities to drive the field forward. Specifically, developments in the following areas would enable fabrication of more powerful spin-qubit based quantum computing devices: circuit design rules implementing cryogenic device physics models, high-fidelity gate patterning of low resistance or superconducting metals, gate-oxide defect mitigation in relevant materials, silicon-germanium heterostructure optimization, and accurate magnetic field generation from on-chip micromagnets.@en

The mission of QuTech is to bring quantum technology to industry and society by translating fundamental scientific research into applied research. To this end we are developing Quantum Inspire (QI), a full-stack quantum computer prototype for future co-development and collaborative R&D in quantum computing. A prerelease of this prototype system is already offering the public cloud-based access to QuTech technologies such as a programmable quantum computer simulator (with up to 31 qubits) and tutorials and user background knowledge on quantum information science (www.quantum-inspire.com). Access to a programmable CMOS-compatible Silicon spin qubit-based quantum processor will be provided in the next deployment phase. The first generation of QI's quantum processors consists of a double quantum dot hosted in an in-house grown SiGe/28Si/SiGe heterostructure, and defined with a single layer of Al gates. Here we give an overview of important aspects of the QI full-stack. We illustrate QI's modular system architecture and we will touch on parts of the manufacturing and electrical characterization of its first generation two spin qubit quantum processor unit. We close with a section on QI's qubit calibration framework. The definition of a single qubit Pauli X gate is chosen as concrete example of the matching of an experiment to a component of the circuit model for quantum computation.@en

Future quantum computers capable of solving relevant problems will require a large number of qubits that can be operated reliably1. However, the requirements of having a large qubit count and operating with high fidelity are typically conflicting. Spins in semiconductor quantum dots show long-term promise2,3 but demonstrations so far use between one and four qubits and typically optimize the fidelity of either single- or two-qubit operations, or initialization and readout4-11. Here, we increase the number of qubits and simultaneously achieve respectable fidelities for universal operation, state preparation and measurement. We design, fabricate and operate a six-qubit processor with a focus on careful Hamiltonian engineering, on a high level of abstraction to program the quantum circuits, and on efficient background calibration, all of which are essential to achieve high fidelities on this extended system. State preparation combines initialization by measurement and real-time feedback with quantum-non-demolition measurements. These advances will enable testing of increasingly meaningful quantum protocols and constitute a major stepping stone towards large-scale quantum computers.@en

Solid-state qubits integrated on semiconductor substrates currently require at least one wire from every qubit to the control electronics, leading to a so-called wiring bottleneck for scaling. Demultiplexing via on-chip circuitry offers an effective strategy to overcome this bottleneck. In the case of gate-defined quantum dot arrays, specific static voltages need to be applied to many gates simultaneously to realize electron confinement. When a charge-locking structure is placed between the quantum device and the demultiplexer, the voltage can be maintained locally. In this study, we implement a switched-capacitor circuit for charge-locking and use it to float the plunger gate of a single quantum dot. Parallel plate capacitors, transistors, and quantum dot devices are monolithically fabricated on a Si/SiGe-based substrate to avoid complex off-chip routing. We experimentally study the effects of the capacitor and transistor size on the voltage accuracy of the floating node. Furthermore, we demonstrate that the electrochemical potential of the quantum dot can follow a 100 Hz pulse signal while the dot is partially floating, which is essential for applying this strategy in qubit experiments. @en

Silicon spin qubits are one of the leading platforms for quantum computation1,2. As with any qubit implementation, a crucial requirement is the ability to measure individual quantum states rapidly and with high fidelity. Since the signal from a single electron spin is minute, the different spin states are converted to different charge states3,4. Charge detection, so far, has mostly relied on external electrometers5–7, which hinders scaling to two-dimensional spin qubit arrays2,8,9. Alternatively, gate-based dispersive read-out based on off-chip lumped element resonators has been demonstrated10–13, but integration times of 0.2–2 ms were required to achieve single-shot read-out14–16. Here, we connect an on-chip superconducting resonant circuit to two of the gates that confine electrons in a double quantum dot. Measurement of the power transmitted through a feedline coupled to the resonator probes the charge susceptibility, distinguishing whether or not an electron can oscillate between the dots in response to the probe power. With this approach, we achieve a signal-to-noise ratio of about six within an integration time of only 1 μs. Using Pauli’s exclusion principle for spin-to-charge conversion, we demonstrate single-shot read-out of a two-electron spin state with an average fidelity of >98% in 6 μs. This result may form the basis of frequency-multiplexed read-out in dense spin qubit systems without external electrometers, therefore simplifying the system architecture.@en

Long coherence times of single spins in silicon quantum dots make these systems highly attractive for quantum computation, but how to scale up spin qubit systems remains an open question. As a first step to address this issue, we demonstrate the strong coupling of a single electron spin and a single microwave photon. The electron spin is trapped in a silicon double quantum dot, and the microwave photon is stored in an on-chip high-impedance superconducting resonator. The electric field component of the cavity photon couples directly to the charge dipole of the electron in the double dot, and indirectly to the electron spin, through a strong local magnetic field gradient from a nearby micromagnet. Our results provide a route to realizing large networks of quantum dot–based spin qubit registers.@en

Electrons and holes confined in quantum dots define excellent building blocks for quantum emergence, simulation, and computation. Silicon and germanium are compatible with standard semiconductor manufacturing and contain stable isotopes with zero nuclear spin, thereby serving as excellent hosts for spins with long quantum coherence. Here, we demonstrate quantum dot arrays in a silicon metal-oxide-semiconductor (SiMOS), strained silicon (Si/SiGe), and strained germanium (Ge/SiGe). We fabricate using a multi-layer technique to achieve tightly confined quantum dots and compare integration processes. While SiMOS can benefit from a larger temperature budget and Ge/SiGe can make an Ohmic contact to metals, the overlapping gate structure to define the quantum dots can be based on a nearly identical integration. We realize charge sensing in each platform, for the first time in Ge/SiGe, and demonstrate fully functional linear and two-dimensional arrays where all quantum dots can be depleted to the last charge state. In Si/SiGe, we tune a quintuple quantum dot using the N + 1 method to simultaneously reach the few electron regime for each quantum dot. We compare capacitive crosstalk and find it to be the smallest in SiMOS, relevant for the tuning of quantum dot arrays. We put these results into perspective for quantum technology and identify industrial qubits, hybrid technology, automated tuning, and two-dimensional qubit arrays as four key trajectories that, when combined, enable fault-tolerant quantum computation.@en

We demonstrate the strong coupling between a single electron spin in silicon and a single photon in a superconducting microwave cavity. Using the same cavity we perform rapid high-fidelity single-shot readout of two-electron spin states.@en