The understanding of quantum mechanics enabled the development of technology such as transistors and has been the foundation of today’s information age. Actively using quantum mechanics to build quantum technology may cause a second revolution in handling information. However, to execute meaningful algorithms, largescale quantum computers have to be built. Such systems are constructed from many qubits, the quantum version of the classical bit. While exciting progress is being made across a range of different qubit platforms, achieving the radical scalability that is necessary to build a largescale processor could be a roadblock. Huge challenges are put on reproducibility, inand output connectivity and material quality. Qubits based on the spins of electrons and holes confined in semiconductor quantum dots may have an important advantage in constructing quantum processors. This platform can profit from the advanced semiconductor industry that was responsible for the first computing revolution. Group IV semiconductors such as silicon and germanium have a high compatibility with industrial semiconductor manufacturing and contain stable isotopes with zero nuclear spin. The materials can be isotopically purified and serve as excellent hosts for spins with long quantum coherence. In Chapter 3 we present quantum dot arrays in silicon metaloxidesemiconductor (SiMOS), strained silicon (Si/SiGe) and strained germanium (Ge/SiGe). A nearly identical integration scheme based on an overlapping gate structure can be used to define quantum dots in each platform. Each platform has its own opportunities, which are carefully assessed. By employing charge sensing we confirm that all quantum dots can be depleted to the singleelectron regime. We compare capacitive crosstalk and find it to be the smallest in SiMOS, relevant for the tuning of quantum dot arrays. Using this crossplatform integration, we can study qubits in each platform with minimal overhead. Long coherence times, excellent singlequbit gate fidelities and twoqubit logic have been demonstrated with SiMOS spin qubits, making it one of the leading platforms for quantum information processing. However, due to the high disorder at the Si/SiO2 interface compared to Ge/SiGe and Si/SiGe interface, quantum dots defined in SiMOS are small and achieving sufficient control over single electrons has been a long standing challenge. In Chapter 5 we show experiments on a double quantum dot that can be isolated from its reservoir. We demonstrate a tunable tunnel coupling between single electrons up to 13 GHz and tunable tunnel rates down to below 1 Hz. These results mark an important step towards the required degree of control over the location of and coupling between quantum dots, necessary for the operation of a large array. @en

Extremely long coherence times, excellent single-qubit gate fidelities, and two-qubit logic have been demonstrated with silicon metal-oxide-semiconductor spin qubits, making it one of the leading platforms for quantum information processing. Despite this, a long-standing challenge in this system has been the demonstration of tunable tunnel coupling between single electrons. Here we overcome this hurdle with gate-defined quantum dots and show couplings that can be tuned on and off for quantum operations. We use charge sensing to discriminate between the (2,0) and (1,1) charge states of a double quantum dot and show excellent charge sensitivity. We demonstrate tunable coupling up to 13 GHz, obtained by fitting charge polarization lines, and tunable tunnel rates down to <1 Hz, deduced from the random telegraph signal. The demonstration of tunable coupling between single electrons in a silicon metal-oxide-semiconductor device provides significant scope for high-fidelity two-qubit logic toward quantum information processing with standard manufacturing.@en

We demonstrate a 36 × 36 gate electrode crossbar that supports 648 narrow-channel field effect transistors (FET) for gate-defined quantum dots, with a quadratic increase in quantum dot count upon a linear increase in control lines. The crossbar is fabricated on an industrial 28Si-MOS stack and shows 100% FET yield at cryogenic temperature. We observe a decreasing threshold voltage for wider channel devices and obtain a normal distribution of pinch-off voltages for nominally identical tunnel barriers probed over 1296 gate crossings. Macroscopically across the crossbar, we measure an average pinch-off of 1.17 V with a standard deviation of 46.8 mV, while local differences within each unit cell indicate a standard deviation of 23.1 mV. These disorder potential landscape variations translate to 1.2 and 0.6 times the measured quantum dot charging energy, respectively. Such metrics provide means for material and device optimization and serve as guidelines in the design of large-scale architectures for fault-tolerant semiconductor-based quantum computing.@en

Spin qubits in quantum dots define an attractive platform for quantum information because of their compatibility with semiconductor manufacturing, their long coherence times, and the ability to operate above one Kelvin. However, despite demonstrations of SWAP oscillations, the integration of this two-qubit gate together with single-qubit control to create a universal gate set as originally proposed for single spins in quantum dots has remained elusive. Here, we show that we can overcome these limitations and execute a multitude of native two-qubit gates, together with single-qubit control, in a single device, reducing the operation overhead to perform quantum algorithms. We demonstrate single-qubit rotations, together with the two-qubit gates CROT, CPHASE, and SWAP, on a silicon double quantum dot. Furthermore, we introduce adiabatic and diabatic composite sequences that allow the execution of CPHASE and SWAP gates on the same device, despite the finite Zeeman energy difference. Both two-qubit gates can be executed in less than 100 ns and, by theoretically analyzing the experimental noise sources, we predict control fidelities exceeding 99%, even for operation above one Kelvin.@en

Recent advances in quantum error correction codes for fault-Tolerant quantum computing and physical realizations of high-fidelity qubits in multiple platforms give promise for the construction of a quantum computer based on millions of interacting qubits. However, the classical-quantum interface remains a nascent field of exploration. Here, we propose an architecture for a silicon-based quantum computer processor based on complementary metal-oxide-semiconductor (CMOS) technology. We show how a transistor-based control circuit together with charge-storage electrodes can be used to operate a dense and scalable two-dimensional qubit system. The qubits are defined by the spin state of a single electron confined in quantum dots, coupled via exchange interactions, controlled using a microwave cavity, and measured via gate-based dispersive readout. We implement a spin qubit surface code, showing the prospects for universal quantum computation. We discuss the challenges and focus areas that need to be addressed, providing a path for large-scale quantum computing.@en

We investigate the magnetic field and temperature dependence of the single-electron spin lifetime in silicon quantum dots and find a lifetime of 2.8 ms at a temperature of 1.1 K. We develop a model based on spin-valley mixing and find that Johnson noise and two-phonon processes limit relaxation at low and high temperature, respectively. We also investigate the effect of temperature on charge noise and find a linear dependence up to 4 K. These results contribute to the understanding of relaxation in silicon quantum dots and are promising for qubit operation at elevated temperatures.@en

We investigate the structural and quantum transport properties of isotopically enriched Si28/SiO228 stacks deposited on 300-mm Si wafers in an industrial CMOS fab. Highly uniform films are obtained with an isotopic purity greater than 99.92%. Hall-bar transistors with an oxide stack comprising 10 nm of Si28O2 and 17 nm of Al2O3 (equivalent oxide thickness of 17 nm) are fabricated in an academic cleanroom. A critical density for conduction of 1.75×1011cm-2 and a peak mobility of 9800cm2/Vs are measured at a temperature of 1.7 K. The Si28/SiO228 interface is characterized by a roughness of Δ=0.4nm and a correlation length of Λ=3.4nm. An upper bound for valley splitting energy of 480μeV is estimated at an effective electric field of 9.5 MV/m. These results support the use of wafer-scale Si28/SiO228 as a promising material platform to manufacture industrial spin qubits.@en

Electrons and holes confined in quantum dots define excellent building blocks for quantum emergence, simulation, and computation. Silicon and germanium are compatible with standard semiconductor manufacturing and contain stable isotopes with zero nuclear spin, thereby serving as excellent hosts for spins with long quantum coherence. Here, we demonstrate quantum dot arrays in a silicon metal-oxide-semiconductor (SiMOS), strained silicon (Si/SiGe), and strained germanium (Ge/SiGe). We fabricate using a multi-layer technique to achieve tightly confined quantum dots and compare integration processes. While SiMOS can benefit from a larger temperature budget and Ge/SiGe can make an Ohmic contact to metals, the overlapping gate structure to define the quantum dots can be based on a nearly identical integration. We realize charge sensing in each platform, for the first time in Ge/SiGe, and demonstrate fully functional linear and two-dimensional arrays where all quantum dots can be depleted to the last charge state. In Si/SiGe, we tune a quintuple quantum dot using the N + 1 method to simultaneously reach the few electron regime for each quantum dot. We compare capacitive crosstalk and find it to be the smallest in SiMOS, relevant for the tuning of quantum dot arrays. We put these results into perspective for quantum technology and identify industrial qubits, hybrid technology, automated tuning, and two-dimensional qubit arrays as four key trajectories that, when combined, enable fault-tolerant quantum computation.@en

Quantum computing's value proposition of an exponential speedup in computing power for certain applications has propelled a vast array of research across the globe. While several different physical implementations of device level qubits are being investigated, semiconductor spin qubits have many similarities to scaled transistors. In this article, we discuss the device/integration of full 300mm based spin qubit devices. This includes the development of (i) a 28 Si epitaxial module ecosystem for growing isotopically pure substrates with among the best Hall mobility at these oxide thicknesses, (ii) a custom 300mm qubit testchip and integration/device line, and (iii) a novel dual nested gate integration process for creating quantum dots. @en