Impact of Temperature Cycling Conditions on Board Level Vibration for Automotive Applications

Conference Paper (2023)
Authors

V. Thukral (NXP Semiconductors)

Irene Bacquet (NXP Semiconductors)

Michiel van Soestbergen (NXP Semiconductors)

Jeroen Zaal (NXP Semiconductors)

R. Roucou (NXP Semiconductors)

Rene Rongen (NXP Semiconductors)

Willem van Driel (TU Delft - Electronic Components, Technology and Materials)

G. Zhang (TU Delft - Electronic Components, Technology and Materials)

Research Group
Electronic Components, Technology and Materials
Copyright
© 2023 V. Thukral, Irene Bacquet, Michiel Van Soestbergen, Jeroen Zaal, Romuald Roucou, Rene Rongen, W.D. van Driel, Kouchi Zhang
To reference this document use:
https://doi.org/10.1109/ECTC51909.2023.00140
More Info
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Publication Year
2023
Language
English
Copyright
© 2023 V. Thukral, Irene Bacquet, Michiel Van Soestbergen, Jeroen Zaal, Romuald Roucou, Rene Rongen, W.D. van Driel, Kouchi Zhang
Research Group
Electronic Components, Technology and Materials
Pages (from-to)
806-813
ISBN (electronic)
9798350334982
DOI:
https://doi.org/10.1109/ECTC51909.2023.00140
Reuse Rights

Other than for strictly personal use, it is not permitted to download, forward or distribute the text or part of it, without the consent of the author(s) and/or copyright holder(s), unless the work is under an open content license such as Creative Commons.

Abstract

Board level vibration testing is a commonly used method to predict the solder joint reliability of surface-mounted components seated onto printed circuit boards (PCB). Current board level vibration test methods are mainly developed from a solely mechanical stress application standpoint. This makes such stress tests one dimensional in nature and translation from experimentally obtained test results to the field life of components experiencing combined stress environments become ambiguous. This investigation provides insights to develop a highly accelerated vibration test approach to cover simultaneous vibration and temperature loading situations in the field. In this paper, test board layouts from the board level drop test method, JESD22-B111 (rectangular PCB), and JESD22-B111A (square PCB), prescribed by the Joint Electronic Device Engineering Council (JEDEC), are used to understand the combined stress applied to the solder interconnects. The evaluation process is carried out by means of simulations, supported by targeted experiments on ball grid array (BGA) packages with dimensions sizing from 12x12mm to 15x15mm. The results on rectangular test board assembly show reduced characteristic lifetime of solder joints when stressed under combined temperature-vibration test conditions. On the other hand, the square-shaped board type exhibits a different acceleration factor with a longer solder fatigue lifetime than that of the rectangular-shaped PCB type. Finite element simulation results complement well with this finding.

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