Combined Array and ADC Structural Test for RRAM-based Multiply-and-Accumulate Circuits
E. A. Serlis (TU Delft - Computer Engineering)
H. Xun (TU Delft - Computer Engineering)
E. Arapidis (TU Delft - Computer Engineering)
A. Gebregiorgis (TU Delft - Computer Engineering)
M. Taouil (CognitiveIC, TU Delft - Computer Engineering)
S. Hamdioui (CognitiveIC, TU Delft - Computer Engineering)
M. Fieback (TU Delft - Computer Engineering)
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Abstract
Compute-in-memory (CIM) AI accelerators using non-volatile memories like RRAM enable energy-efficient edge inference by executing Multiply-Accumulate (MAC) operations directly in memory in a single cycle. These designs modify memory cells and analog-to-digital converters (ADCs), introducing faults not seen in standard memories. We present the first structural testing methodology and framework for RRAM-based CIM MAC circuits, including defect and fault models for memory cells and ADCs. Our robust inference-driven tests exercise full MAC functionality, significantly reducing test time compared to traditional methods, and integrating cell and peripheral testing to ensure high reliability, defect coverage, and operational efficiency.