Characterization and Compact Modeling of Nanometer CMOS Transistors at Deep-Cryogenic Temperatures

Journal Article (2018)
Author(s)

Rosario M. Incandela (TU Delft - OLD QCD/Charbon Lab, TU Delft - QuTech Advanced Research Centre, Kavli institute of nanoscience Delft)

L Song (TU Delft - ImPhys/Quantitative Imaging, Analog Devices Inc.)

H.A.R. Homulle (Kavli institute of nanoscience Delft, TU Delft - QuTech Advanced Research Centre, TU Delft - OLD QCD/Charbon Lab)

Edoardo Charbon (TU Delft - OLD QCD/Charbon Lab, TU Delft - (OLD)Applied Quantum Architectures, Kavli institute of nanoscience Delft, Intel Labs)

A. Vladimirescu (Institut Supérieur d’Electronique de Paris,, University of California)

Fabio Sebastiano (TU Delft - (OLD)Applied Quantum Architectures)

Research Group
OLD QCD/Charbon Lab
Copyright
© 2018 R.M. Incandela, L Song, Harald Homulle, E. Charbon-Iwasaki-Charbon, A. Vladimirescu, F. Sebastiano
DOI related publication
https://doi.org/10.1109/JEDS.2018.2821763
More Info
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Publication Year
2018
Language
English
Copyright
© 2018 R.M. Incandela, L Song, Harald Homulle, E. Charbon-Iwasaki-Charbon, A. Vladimirescu, F. Sebastiano
Research Group
OLD QCD/Charbon Lab
Volume number
6
Reuse Rights

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Abstract

Cryogenic characterization and modeling of two nanometer bulk CMOS technologies (0.16-μm and 40-nm) are presented in this paper. Several devices from both technologies were extensively characterized at temperatures of 4 K and below. Based on a detailed understanding of the device physics at deep-cryogenic temperatures, a compact model based on MOS11 and PSP was developed. In addition to reproducing the device DC characteristics, the accuracy and validity of the compact models are demonstrated by comparing time-and frequency-domain simulations of complex circuits, such as a ring oscillator and a low-noise amplifier (LNA), with the measurements at 4 K.

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