Print Email Facebook Twitter Accelerating RRAM Testing with a Low-cost Computation-in-Memory based DFT Title Accelerating RRAM Testing with a Low-cost Computation-in-Memory based DFT Author Singh, A. (TU Delft Computer Engineering) Fieback, M. (TU Delft Computer Engineering) Bishnoi, R.K. (TU Delft Computer Engineering) Bradarić, Filip (Student TU Delft) Gebregiorgis, A.B. (TU Delft Computer Engineering) Joshi, R.V. (IBM Thomas J. Watson Research Centre) Hamdioui, S. (TU Delft Quantum & Computer Engineering) Contributor Ceballos, Cristina (editor) Department Quantum & Computer Engineering Date 2022 Abstract Emerging non-volatile resistive RAM (RRAM) device technology has shown great potential to cultivate not only high-density memory storage, but also energy-efficient computing units. However, the unique challenges related to RRAM fabrication process render the traditional memory testing solutions inefficient and inadequate for high product quality. This paper presents low-cost design-for-testability (DFT) solutions that augment the testing process and improve the fault coverage. A computation-in-memory (CIM) based DFT is realized to expedite the detection and diagnosis of faults by developing logic designs involving multi-row activation. A novel addressing scheme is introduced to facilitate the diagnosis of faults. Reconfigurable logic designs are developed to detect unique RRAM faults that offer features such as programmable reference generations, period, and voltage of operation. DFT implementations are validated on a post-layout extracted platform and testing sequences are introduced by incorporating the proposed DFTs. Results show that more than 2.3× speedup and better coverage are achieved with 6× area reduction when compared with state-of-the-art solutions. Subject Design-for-testability (DFT)Testing RRAMcomputation-in-memory (CIM)binary logicRRAM defects To reference this document use: http://resolver.tudelft.nl/uuid:b3c28bc7-2a91-4d7a-bd40-9971e6744322 DOI https://doi.org/10.1109/ITC50671.2022.00085 Publisher IEEE, Piscataway Embargo date 2023-07-01 ISBN 978-1-6654-6271-6 Source Proceedings - 2022 IEEE International Test Conference, ITC 2022 Event 2022 IEEE International Test Conference (ITC), 2022-09-23 → 2022-09-30, Anaheim, United States Series Proceedings - International Test Conference, 1089-3539, 2022-September Bibliographical note Green Open Access added to TU Delft Institutional Repository 'You share, we take care!' - Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public. Part of collection Institutional Repository Document type conference paper Rights © 2022 A. Singh, M. Fieback, R.K. Bishnoi, Filip Bradarić, A.B. Gebregiorgis, R.V. Joshi, S. Hamdioui Files PDF Accelerating_RRAM_Testing ... ed_DFT.pdf 1.17 MB Close viewer /islandora/object/uuid:b3c28bc7-2a91-4d7a-bd40-9971e6744322/datastream/OBJ/view