This article presents a family of sub-1-V, fully-CMOS voltage references adopting MOS devices in weak inversion to achieve continuous operation from room temperature (RT) down to cryogenic temperatures. Their accuracy limitations due to curvature, body effect, and mismatch are investigated and experimentally validated. Implemented in 40-nm CMOS, the references show a line regulation better than 2.7%/V from a supply as low as 0.99 V. By applying dynamic element matching (DEM) techniques, a spread of 1.2% (3σ ) from 4.2 to 300 K can be achieved, resulting in a temperature coefficient (TC) of 111 ppm/K. As the first significant statistical characterization extending down to cryogenic temperatures, the results demonstrate the ability of the proposed architectures to work under cryogenic harsh environments, such as space- and quantum-computing applications.

CMOS circuits operating at cryogenic temperature (cryo-CMOS) are required in several lowerature applications. A compelling example is the electronic interface for quantum processors, which must reside very close to the cryogenic quantum devices it serves, and hence operate at the same temperature, so as to enable practical large-scale quantum computers. Such cryo-CMOS circuits must achieve extremely high performance while dissipating minimum power to be compatible with existing cryogenic refrigerators. These requirements asks for cryo-CMOS electronics on par with or even exceeding their roomerature counterparts. This paper overviews the challenges and the opportunities in designing cryo-CMOS circuits, with a focus on analog and mixed-signal circuits, such as voltage references and data converters.