Real-time edge artificial intelligence (AI) demands memory elements that are not only energy-efficient and multifunctional, but also compact, tunable, and integrable with flexible substrates. Planar memory architecture offers distinct advantages for neuromorphic computing, including surface accessibility, facile fabrication, and seamless integration with flexible substrates, making it ideal for next-generation synaptic hardware. Traditional metal oxide-based memristors often fail to meet all these requirements simultaneously due to their rigid architecture and limited material versatility. Herein, we present a planar Ti³C²T^x-MXene-based memristor (PMX-memristor) fabricated on a flexible cyclic olefin copolymer (COC) substrate, constituting the first fully planar MXene-based resistive device reported to date. The planar architecture exposes the active MXene channel, which enables direct surface inspection and functionalization while delivering robust analog switching. By tuning the voltage amplitude, the device operates in two modes: (i) a volatile regime based on valence change dynamics with transient conductance states, and (ii) a non-volatile regime driven by voltage-induced Ti→TiOx transformation, supporting eight distinct resistance levels. Detailed EDX and XPS analyses, performed before and after electrical stress, confirm the voltage-induced oxidation pathway that underpins this dual-mode behavior. The memristor’s eight-level precision enables compact 9-bit weight encoding using 3×3-bit multi-level cells in crossbar arrays, reducing area and energy compared to binary implementations. We demonstrate end-to-end deployment of these devices in spiking neural networks for real-time classification of neuromorphic vision datasets, showcasing high-performance, task-relevant learning capabilities on benchmarks such as N-MNIST and DVS-Gesture. These results underscore the potential of the designed PMX-memristor for voltage-controlled, neuromorphic edge computing and provide direct surface accessibility for functionalization and potential bio-interfacing for next-generation smart wearables.

Abstract: The development of flexible memristor (MR) devices is a nascent research area with great potential to revolutionize wearable electronics. A few flexible MR devices with proven functionality and reliability have been introduced in the literature. This article describes the development of a novel paper MR device, named PrMem, employing a novel low-cost fabrication technique. PrMem consists of three layers: a top electrode, an active layer, and a bottom electrode. All three layers are made of the same materials, specifically, cellulose and reduced graphene oxide with different concentrations. Detailed I–V measurements are carried out to verify the resistive switching property of PrMem. Because the device is made entirely of paper, it is hydrophilic, which means that liquids may flow freely through its porous structure. This simple capillary action eliminates the need for additional mechanical pumping structures, making PrMem a promising candidate for a variety of applications. We are the first to report on the significant potential of flexible GO-based paper MR devices for emerging wearable electronics and sensing applications. Using only paper to make MR has the advantages of being low cost, flexible, effective, biocompatible, and conveniently disposable. Impact statement: This article describes the first paper-based flexible graphene oxide memristor device with vertical stack configuration. Developed and reported is a novel, cost-effective fabrication technique for paper electronics. By oxidizing reduced graphene oxide, the fully paper device achieves memristive switching behavior. The devices exhibit analog switching behavior as they undergo a transition from a state of low resistance to a state of high resistance. The device’s resistance naturally returns to its initial state without the need for a RESET voltage. The reported findings open a new frontier for research into the use of paper-based memristor devices in a wide range of applications. Graphical abstract: [Figure not available: see fulltext.].

The advances in material science along with the development of fabrication techniques have enabled the realization of thin-film-based electronics on active substrates. This has substantially enhanced and supported the deployment of electronic devices in several emerging applications with flexible functionality. In this work, we report a novel fabrication of graphene oxide (GO)- based memristor devices on an active/shrinkable substrate. The standard lithography process is used to fabricate planar Au-rGO-Au devices on a polymer substrate that has the ability to shrink at a certain temperature (i.e., 170 °C). Upon heating, the devices are shrunk to 50% of their original size. A detailed electrical characterization has been carried out to study the switching behavior of the fabricated devices before and after shrinking. The results prove that upon shrinking, the device preserves its switching ability with enhanced electrical parameters (i.e., switching voltage). Also, material characterization performed for the deposited GO on the active substrate shows improved properties of the GO film due to the enhanced arrangement of GO flakes after shrinking. The novel approach proposed in this work provides new insights into and offers the ability to scale thin-film electronics postfabrication and thus overcome some of the device scaling challenges due to manufacturing limitations. It also unfolds a new path for the realization of GO-based electronic devices with improved electrical properties, which is a crucial aspect of the development of highly flexible and lightweight green electronics.

Environmentally friendly humidity sensors with high sensing performance are considered crucial components for various wearable electronic devices. We developed a rapid-response and durable Paper Cellulose Fiber/Graphene Oxide Matrix (PCFGOM) humidity sensor using an all-carbon functional material. The fabricated sensor demonstrated a high sensitivity to humidity through an electrical impedance measurement, with an increase in response to humidity ranging from 10% to 90% at 1 kHz and 10 kHz, respectively, along with a response time of 1.2 s and a recovery time of 0.8 s. The stability of the sensor was also examined, with consistent performance over a period of 24 h. This novel sensor was employed in several applications, including non-contact proximity sensing, environmental humidity detection, and human respiration detection, to showcase its potential. Moreover, this work represents a significant milestone in developing inexpensive and eco-friendly humidity sensors, given the abundance of paper and graphene in nature and their biocompatibility.

Advances in materials science and memory devices work in tandem for the evolution of Artificial Intelligence systems. Energy-efficient computation is the ultimate goal of emerging memristor technology, in which the storage and computation can be done in the same memory crossbar. In this work, an analog memristor device is fabricated utilizing the unique characteristics of single-wall carbon nanotubes (SWCNTs) to act as the switching medium of the device. Via the planar structure, the memristor device exhibits analog switching ability with high state stability. The device’s conductance and capacitance can be tuned simultaneously, increasing the device's potential and broadening its applications' horizons. The multi-state storage capability and long-term memory are the key factors that make the device a promising candidate for bio-inspired computing applications. As a demonstrator, the fabricated memristor is deployed in spiking neural networks (SNN) to exploit its analog switching feature for energy-efficient classification operation. Results reveal that the computation-in-memory implementation performs Vector Matrix Multiplication with 95% inference accuracy and few femtojoules per spike energy efficiency. The memristor device presented in this work opens new insights towards utilizing the outstanding features of SWCNTs for efficient analog computation in deep learning systems.

Recently, phase change chalcogenides, such as monochalcogenides, are reported as switching materials for conduction-bridge-based memristors. However, the switching mechanism focused on the formation and rupture of an Ag filament during the SET and RESET, neglecting the contributions of the phase change phenomenon and the distribution and re-distribution of germanium vacancies defects. The different thicknesses of germanium telluride (GeTe)-based Ag/GeTe/Pt devices are investigated and the effectiveness of phase loops and defect loops future application in neuromorphic computing are explored. GeTe-based devices with thicknesses of 70, 100, and 200 nm, are fabricated and their electrical characteristics are investigated. Highly reproducible phase change and defect-based characteristics for a 100 nm-thick GeTe device are obtained. However, 70 and 200 nm-thick devices are unfavorable for the reliable memory characteristics. Upon further analysis of the Ag/GeTe/Pt device with 100 nm of GeTe, it is discovered that a state-of-the-art dependency of phase loops and defect loops exists on the starting and stopping voltage sweeps applied on the top Ag electrode. These findings allow for a deeper understanding of the switching mechanism of monochalcogenide-based conduction-bridge memristors.

The adverse effect of ultraviolet (UV) radiation on human beings has sparked intense interest in the development of new sensors to effectively monitor UV and solar exposure. This paper describes a novel low-cost and flexible graphene oxide (GO)-based paper sensor capable of detecting the total amount of UV or sun energy delivered per unit area. GO is incorporated into the structure of standard printing paper, cellulose, via a low-cost fabrication technique. The effect of UV and solar radiation exposure on the GO paper-based sensor is investigated using a simple color change analysis. As a result, users can easily determine the amount of ultraviolet or solar energy received by the sensor using a simple color analysis application. A neural network (ANN) model is also explored to learn the relation between UV color intensity and exposure time, then digitally display the results. The accuracy for the developed ANN reached 96.83%. The disposable, cost-effective, simple, biodegradable, safe, and flexible characteristics of the paper-based UV sensor make it an attractive candidate for a variety of sensing applications. This work provides new vision toward developing highly efficient and fully disposable GO-based photosensors. Graphical Abstract: [Figure not available: see fulltext.]

Random spray retinex (RSR) is an effective image enhancement algorithm owing to its effectiveness in improving the image quality. However, the computing complexity of the algorithm, the required hardware resources, and memory access hamper its deployment in many application scenarios, for instance, in IoT systems with limited hardware resources. With the rise of artificial intelligence (AI), the use of image enhancement has become essential for improving the performance of many emerging applications. In this paper, we propose the use of RSR as a preprocessing filter before the task of semantic segmentation of low-quality urban road scenes. Using the publicly available Cityscapes dataset, we compared the performance of a pre-trained deep semantic segmentation network on dark and noisy images with that of RSR preprocessed images. Our findings confirm the effectiveness of RSR in improving segmentation accuracy. In addition, to address the computational complexity and suitability of edge devices, we propose a novel and efficient implementation of RSR using resistive random access memory (RRAM) technology. This architecture provides highly parallel analog in-memory computing (IMC) capabilities. A detailed, efficient, and low-latency implementation of RSR using RRAM-CMOS technology is described. The design was verified using SPICE simulations with measured data from the fabricated RRAM and 65 nm CMOS technologies. The approach presented here represents an important step towards a low-complexity, real-time hardware-friendly architecture and the design of retinex algorithms for edge devices.

Physical unclonable functions (PUF) are cryptographic primitives employed to generate true and intrinsic randomness which is critical for cryptographic and secure applications. Thus, the PUF output (response) has properties that can be utilized in building a true random number generator (TRNG) for security applications. The most popular PUF architectures are transistor-based and they focus on exploiting the uncontrollable process variations in conventional CMOS fabrication technology. Recent development in emerging technology such as memristor-based models provides an opportunity to achieve a robust and lightweight PUF architecture. Memristor-based PUF has proven to be more resilient to attacks such as hardware reverse engineering attacks. In this paper, we design a lightweight and low-cost memristor PUF and verify it against cryptographic randomness tests achieving a unique, reliable, irreversible random sequence output. The current research demonstrates the architecture of a low-cost, high endurance Cu/HfO₂/ p^{+ +}Si memristor-based PUF (MR-PUF) which is compatible with advanced CMOS technologies. This paper explores the 15 NIST cryptographic randomness tests that have been applied to our Cu/HfO₂/ p^{+ +}Si MR-PUF. Moreover, security properties such as uniformity, uniqueness, and repeatability of our MR-PUF have been tested in this paper and validated. Additionally, this paper explores the applicability of our MR-PUF on block ciphers to improve the randomness achieved within the encryption process. Our MR-PUF has been used on block ciphers to construct a TRNG cipher block that successfully passed the NIST tests. Additionally, this paper investigated MR-PUF within a new authenticated key exchange and mutual authentication protocol between the head-end system (HES) and smart meters (SM)s in an advanced metering infrastructure (AMI) for smartgrids. The authenticated key exchange protocol utilized within the AMI was verified in this paper to meet the essential security when it comes to randomness by successfully passing the NIST tests without a post-processing algorithm.

This work presents a novel planar memimpedance device, named AMemImp, that consists of a Silver/reduced Graphene Oxide/Silver junction. AMemImp exhibits a unique ability for analog memimpedance tuning. For the first time in the literature, it is shown that the resistance and the capacitance of AMemImp device can be tuned simultaneously using a suitable voltage pulse. The oxide gap size (the distance between the metal electrodes) effect on both resistance and capacitance is also studied. It is proved that AMemImp capacitance follows semiconductors-based capacitance behavior during full ON state, while it has the insulator-based parallel plate capacitance characteristics during full OFF state. As a demonstrator, the analog capacitance switching behavior of AMemImp is utilized to build 2 capacitors and 2 transistors (2C2T) computation cell to perform multiply-and-accumulate operation. The non-volatile memcapacitor is exploited to store the data during the programming mode and perform multiplication in the computation mode. The 2C2T is used in a 5x4 crossbar where 20 operations are achieved in a single clock cycle with an error of 5.7%. AMemImp is considered great merit for tunable memory, computing, and RF systems.

Recently, Memristor (MR) device has received much attention in many applications, including memory, computing, neuromorphic, sensing, and security. Electrical characterization and testing of MR are among the main challenges facing MR technology. Available MR characterization tools are costly and bulky, limiting the research contributions in this field to big institutions. Furthermore, there is a need for a portable testing platform that provides the means to extract MR parameters, mainly when used in sensing or security applications. This work proposes a novel power-efficient, cost-effective, lightweight, and automated Arduino-based MR characterization platform named MemChar. A detailed circuit and system implementation of MemChar are presented. MemChar functionality results are compared to industry-standard device parameter analyzer tools, i.e., Keithley 4200A, with excellent correlation. MemChar is an easy-to-implement and user-friendly platform that provides a significant milestone toward utilizing MR devices in mobile, IoT, and sensing applications.

This work reports on the fabrication of a novel planar reduced graphene oxide (rGO) memristor (MR) device. For the first time in the literature, the MR tunable resistive switching behavior is controlled by the GO reduction time at a constant temperature. The device is fabricated using standard microfabrication techniques on a flexible cyclic olefin copolymer substrate (COC). Thermal reduction of the GO layer at low temperatures (100^◦ C) avoids the drawbacks of chemical reduction methods such as toxicity and electrode metal damage during fabrication, while allowing for fine-tuning of the MR’s switching behavior. The device has analog switching characteristics, with a range of different resistance states. By taking advantage of the slow nature of GO thermal annealing, the switching properties of the rGO memristors can be precisely controlled by adjusting the reduction period. At short annealing times (i.e., T < 20 h), the devices switch from high to low resistance states, while at longer annealing times the switching behavior is reversed, with the device switching from low to high resistance states (LRS to HRS). Resistive switching occurs as a result of the diffusion and removal of the oxygen functional groups in the GO film caused by Joule heating induced by the electric current. Complete electrical characterization tests are presented along with wettability and X-ray diffraction (XRD) tests. This work opens a new vision for realizing rGO-based MR devices with tunable switching properties, broadening the application horizon of the device.

In this work we present SCRAMBLE, a configurable neuromorphic architecture that provides security against different threats by employing memristors for critical parts and functions. More specifically, we employ memristive memory cells - that are 3D stacked on top of the configurable neuromorphic hardware - to securely hold the weights as well as activation functions of any model processed on the generalized architecture. Thus, programmable memristive cells enable reconfiguration of the architecture to thwart both model stealing and hardware IP stealing attacks. We implement a proof-of-concept for the proposed architecture and analyze its security metrics. We also benchmark it against selected prior art for neuromorphic architectures to quantify the security-performance trade-offs.

This work reports on flexible cost-effective memristor device synthesis, using Pt/GO/Cu structure. The memristor is fabricated on flexible substrate and it preserves its switching ability at a bending angle of up to 60^◦. Compared to the state of the art, in our fabrication method, the graphene oxide (GO) film is deposited directly to the device using spin coating. The fabricated memristor stack exhibits tunable volatility based on the used compliance current, which expands its application horizon for memory, computing and security schemes. In this work, the non-volatile regime along with the natural stochasticity of the switching behavior of the device, named SecureMem, are utilized for efficient true random number generation. A prototype of the full system interfacing with microcontroller is built to get SecureMem ready for integration with other circuits and systems. The randomness of the data generated by SecureMem prototype is confirmed by passing all National Institute of Standards and Technology tests without any post-processing or hardware overhead. SecureMem is considered a great asset as it provides new insights for highly efficient cost-effective hardware security in smart wearable devices.

This work reports a novel true random number generator (TRNG) using Cu/GO/Pt memristive stack. The volatile regime of the device is utilized to achieve natural stochasticity among the switching cycles. An efficient Arduino-based circuit is built and connected to the memristor to produce the data with low power and cost overheads. National Institute of Standards and Technology (NIST) tests are used to assess the randomness of the generated bits. The produced data passes all NIST tests without the post-processing steps used by most of the true random number generators reported in the literature. Flexibility is a unique feature of the device reported in this work, being fabricated on flexible polymer substrate. This enhances the value of the TRNG and facilitates its deployment in smart wearable devices. This work is considered a great millstone towards efficient flexible secure smart electronics.

Tunable electronics are of great potential for intelligent, adaptable systems. Memristors and memcapacitors have been extensively investigated recently as low power, high density, and high-speed elements to provide tunable-state needed by many emerging applications. Examples of such systems are tunable filters, tunable antennas, multi-level memory, and computing components. This work reports on a novel tunable analog memimpedance device. For the first time, it is proved that analog change in both resistance and capacitance can be achieved simultaneously in the same metal–semiconductor-metal structure. The novel planar geometry device consists of silver-reduced graphene oxide-silver. The multistate memimpedance behavior is observed and investigated for different oxide widths and the results confirmed the scaling of the device capacitance accordingly. Detailed study based on experimental findings shows that the capacitance of the novel system presented in this work follows n-type MOS capacitance behavior. The device is fabricated on a flexible substrate which extends its value to be deployable in smart wearable devices, in addition to its compatibility with CMOS Technology.

True Random Number Generators (TRNGs) are used in a variety of applications including cryptography, computer simulation, gambling games, machine learning and hyperdimensional computing. Dynamic Random-Access Memory (DRAM)-based TRNGs have been widely used as they are low cost and available in most modern electronic devices. However, most existing DRAM-based TRNGs produce random numbers with either hardware overhead, or low throughput. In this work, we report a novel high dense, high throughput and high entropy DRAM-based TRNG, named DTRNG, that exploits the process variations inherited by the DRAM cell's access transistor and sense amplifiers. DTRNG can be employed in commodity DRAM chips with no hardware overhead and using the standard memory controller commands. The proposed method is based on controlling the word line voltage supply part of the DRAM chip during random number mode. The novel approach provided in this work has been validated using cadence circuit tools on a constructed 8x8 DRAM chip in 65nm technology. In addition, Monte Carlo simulations are performed to verify the entropy of the generated numbers. The random sequence generated by DTRNG has passed all the NIST test without any post-processing demonstrating randomness and suitability for security scheme. DTRNG is considered a milestone towards low cost and high efficient secure hardware for AI and IoT applications.

Artificial Intelligence (AI) at the edge has become a hot subject of the recent technology-minded publications. The challenges related to IoT nodes gave rise to research on efficient hardware-based accelerators. In this context, analog memristor devices are crucial elements to efficiently perform the multiply-and-add (MAD) operations found in many AI algorithms. This is due to the ability of memristor devices to perform in-memory-computing (IMC) in a way that mimics the synapses in human brain. Here, we present a novel planar analog memristor, namely NeuroMem, that includes a partially reduced Graphene Oxide (prGO) thin film. The analog and non-volatile resistance switching of NeuroMem enable tuning it to any value within the RON and ROFF range. These two features make NeuroMem a potential candidate for emerging IMC applications such as inference engine for AI systems. Moreover, the prGO thin film of the memristor is patterned on a flexible substrate of Cyclic Olefin Copolymer (COC) using standard microfabrication techniques. This provides new opportunities for simple, flexible, and cost-effective fabrication of solution-based Graphene-based memristors. In addition to providing detailed electrical characterization of the device, a crossbar of the technology has been fabricated to demonstrate its ability to implement IMC for MAD operations targeting fully connected layer of Artificial Neural Network. This work is the first to report on the great potential of this technology for AI inference application especially for edge devices.

This study presents a novel hybrid memristor (MR)-complementary metal-oxide-semiconductor-based flash analogue-to-digital converter (ADC). The speed and efficiency of the ADC are important aspects that can significantly affect the overall system performance. The flash ADC is considered the fastest type of ADCs; however, its performance is affected by the resistor mismatch. The proposed flash ADC is the first to use tunable MR to replace conventional resistor to generate accurate reference voltages. This is achieved by utilising the highly analogue behaviour observed in multi-state MR devices fabricated and tested by the authors' group. The electrical parameters of the devices have been extracted by device characterisation, then the voltage-threshold adaptive model (VTEAM) has been used to develop a correlated mathematical and Simulation Program with Integrated Circuit Emphasis (SPICE) device model. The proposed MR-based flash-ADC design solves the issue of resistor mismatch that results in encoding errors by the ability to tune the MR resistance value post-processing. Moreover, being a nanoscale component, the usage of MR significantly improves the area efficiency of the target ADC. Furthermore, the proposed design has improved the ADC transfer function characteristic and has lower differential non-linearity and integral non-linearity errors compared with the conventional design.

Recently, graphene has been explored in several research areas according to its outstanding combination of mechanical and electrical features. The ability to fabricate micro-patterns of graphene facilitates its integration in emerging technologies such as flexible electronics. This work reports a novel micro-pattern approach of graphene oxide (GO) film on a polymer substrate using metal bonding. It is shown that adding ethanol to the GO aqueous dispersion enhances substantially the uniformity of GO thin film deposition, which is a great asset for mass production. On the other hand, the presence of ethanol in the GO solution hinders the fabrication of patterned GO films using the standard lift-offiprocess. To overcome this, the fabrication process provided in this work takes advantage of the chemical adhesion between theGOor reducedGO(rGO) and metal films. It is proved that the adhesion between the metal layer and GO or rGO is stronger than the adhesion between the latter and the polymer substrate (i.e., cyclic olefin copolymer used in this work). This causes the removal of the GO layer underneath the metal film during the lift-offprocess, leaving behind the desired GO or rGO micro-patterns. The feasibility and suitability of the proposed pattern technique is confirmed by fabricating the patterned electrodes inside a microfluidic device to manipulate living cells using dielectrophoresis. This work adds great value to micro-pattern GO and rGO thin films and has immense potential to achieve high yield production in emerging applications.