DC-to-DC converters have been used in portable electronic applications such as laptops and mobile phones where power efficiency is very important. In these applications, basic converters like buck and boost converters are used. However, the conversion ratio of conventional boost converters is not high. To achieve a high conversion ratio, the duty cycle of the conventional boost converters must be increased drastically, which increases the conduction loss. This thesis presents a topology to tackle this issue. A control system is designed and the pulse frequency modulation (PFM) method is used. In this thesis, a complete analysis of this topology, such as efficiency evaluation and stability analysis, is provided. This circuit is designed in 180nm BCD technology. Simulation results show it has a wide load range (0 to1.8A), high line regulation 0.8%/V, load regulation 2.9%/A, while achieving 88.1%, 93.0%, and 94.8% when CR = 5, CR = 4.5, and CR = 3.7, at <\ba= 1.2A respectively.