Electron-spin qubits in Si/SiGe quantum wells are limited by the small and variable energy separation of the conduction-band valleys. While sharp quantum-well interfaces are pursued to increase the valley-splitting energy deterministically, here we explore an alternative approach to enhancing the valley splitting on average. We grow increasingly thinner quantum wells with broad interfaces to controllably increase the electron wave function overlap with Ge atoms. Quantum Hall measurements of two-dimensional electron gases reveal a linear correlation between valley splitting and disorder-induced single-particle energy-level broadening, driven by increasing alloy scattering at the Si/SiGe interface. We demonstrate enhanced valley splitting while maintaining respectable electron mobility, indicating a low-disorder electrostatic potential environment. Simulations using experimental Ge concentration profiles predict an average valley splitting in quantum dots that matches the enhancement observed in two-dimensional systems. Our results motivate the experimental realization of quantum-dot spin qubits in these heterostructures.

We investigate the disorder properties of two-dimensional hole gases in Ge/SiGe heterostructures grown on Ge wafers, using thick SiGe barriers to mitigate the influence of the semiconductor-dielectric interface. Across several heterostructure field effect transistors, we measure an average maximum mobility of ( 4.4 ± 0.2 ) × 10 6 cm 2 / Vs at a saturation density of ( 1.72 ± 0.03 ) × 10 11 cm − 2 , corresponding to a long mean free path of ( 30 ± 1 ) μ m . The highest measured mobility is 4.68 × 10 6 cm 2 / Vs . We identify uniform background impurities and interface roughness as the dominant scattering mechanisms limiting mobility in a representative device, and we evaluate a percolation-induced critical density of ( 4.5 ± 0.1 ) × 10 9 cm − 2 . This low-disorder heterostructure, according to simulations, may support the electrostatic confinement of holes in gate-defined quantum dots.

Charge noise in the host semiconductor degrades the performance of spin-qubits and poses an obstacle to control large quantum processors. However, it is challenging to engineer the heterogeneous material stack of gate-defined quantum dots to improve charge noise systematically. Here, we address the semiconductor-dielectric interface and the buried quantum well of a ²⁸Si/SiGe heterostructure and show the connection between charge noise, measured locally in quantum dots, and global disorder in the host semiconductor, measured with macroscopic Hall bars. In 5 nm thick ²⁸Si quantum wells, we find that improvements in the scattering properties and uniformity of the two-dimensional electron gas over a 100 mm wafer correspond to a significant reduction in charge noise, with a minimum value of 0.29 ± 0.02 μeV/Hz^½ at 1 Hz averaged over several quantum dots. We extrapolate the measured charge noise to simulated dephasing times to CZ-gate fidelities that improve nearly one order of magnitude. These results point to a clean and quiet crystalline environment for integrating long-lived and high-fidelity spin qubits into a larger system.

The lack of mirror symmetry in binary semiconductor compounds turns them into polar materials, where two opposite orientations of the same crystallographic direction are possible. Interestingly, their physical properties (e.g., electronic or photonic) and morphological features (e.g., shape, growth direction, and so forth) also strongly depend on the polarity. It has been observed that nanoscale materials tend to grow with a specific polarity, which can eventually be reversed for very specific growth conditions. In addition, polar-directed growth affects the defect density and topology and might induce eventually the formation of undesirable polarity inversion domains in the nanostructure, which in turn will affect the photonic and electronic final device performance. Here, we present a review on the polarity-driven growth mechanism at the nanoscale, combining our latest investigation with an overview of the available literature highlighting suitable future possibilities of polarity engineering of semiconductor nanostructures. The present study has been extended over a wide range of semiconductor compounds, covering the most commonly synthesized III-V (GaN, GaP, GaAs, GaSb, InN, InP, InAs, InSb) and II-VI (ZnO, ZnTe, CdS, CdSe, CdTe) nanowires and other free-standing nanostructures (tripods, tetrapods, belts, and membranes). This systematic study allowed us to explore the parameters that may induce polarity-dependent and polarity-driven growth mechanisms, as well as the polarity-related consequences on the physical properties of the nanostructures.