This paper presents the design aspect of a BJT-based temperature sensor implemented in standard CMOS technology that is optimized for its noise-power performance. The interface electronics of the sensor consists of a continuous-time duty-cycle modulator, where a capacitor is periodically charged and discharged, with two temperature-dependent current sources, between two thresholds determined by a Schmitt trigger. In order to optimize the noise properties of the sensor, the major noise sources have been analyzed and optimized using target specifications of the manufacturer. Experimental results are in agreement with those of simulations and analytical calculations. The sensor has been implemented in 0.7μm CMOS technology. At 3.3V supply, the measured temperature resolution amounts to 3mK for a measurement time of 1.8ms. The test results show that a Resolution Figure of Merit (RFoM) of 3.2pJK2 has been achieved in this design, which is the best reported result for BJT-based temperature sensors in the market.

This paper describes the design of a precision bipolar junction transistor based temperature sensor implemented in standard 0.7-μmCMOS technology. It employs substrate p-n-ps as sensing elements,which makes it insensitive
to the effects of mechanical (packaging) stress and facilitates the use of low-cost packaging technologies. The sensor outputs a duty-cycle-modulated signal, which can easily be interfaced to the digital world and, after low-pass filtering, to the analog world. In order to eliminate the errors caused by the component mismatch, chopping and dynamic element matching (DEM) techniques have been applied. The required component shuffling was done concurrently rather than sequentially, resulting in a fast DEM scheme that saves energy without degrading accuracy. After a singletemperature trim, the sensor’s inaccuracy is ±0.1 °C (−20 to 60 °C) and ±0.3 °C (−45 to 130 °C), respectively. Measurements of sensors in different packages show that the package-induced shift is less than 0.1 °C. Measurements of eight sensors over 367 days show that their output drift is less than 6 mK. While dissipating only 200 μW, the sensor achieves a resolution of 3 mK (rms) in a 1.8-ms measurement time, and a state-of-the-art resolution figure of merit of 3.2 pJK2. This combination of high accuracy, high resolution, high speed, and low-energy consumption makes this sensor suited for commercial and industrial applications.

In this paper, a low-power CMOS smart temperature sensor is presented. The temperature information extracted using substrate PNP transistors is digitized with a resolution of 0.03 °C using a precision switched-capacitor (SC) incremental
A/D converter. After batch calibration, an inaccuracy of ±0.25 °C (±3σ ) from −70 °C to 130 °C is obtained. This represents a two-fold improvement compared to the state-ofthe-art. After individual calibration at room temperature, an
inaccuracy better than ±0.1 °C over the military temperature range is obtained, which is in-line with the state-of-the-art. This performance is achieved at a power consumption of 65 μW during a measurement time of 100 ms, by optimizing the power/inaccuracy tradeoffs, and by employing a clock frequency
proportional to absolute temperature. The latter ensures accurate settling of the SC input stage at low temperatures, and reduces the effects of leakage currents at high temperatures.

In this paper, a programmable time-gain-compensation amplifier dedicated to a 2D piezoelectric ultrasound transducer is presented. It uses an open-loop amplifier structure consisting of a voltage-to-current converter and a current-to-voltage converter. The circuit has been designed in a standard 0.35-μm CMOS process. Simulation and measurement results show that gains of 0dB, 12dB, 26dB and 40dB can be achieved for input signals centered at 6MHz with 80dB dynamic range (100V to 1V). The measured gain errors at 6MHz are below 1dB for all gain settings. The amplifier consumes only 130W when driving a 250f Fload.