22 records found
1
Transient faults in DRAMs: concept, analysis and impact on tests
Static and dynamic behavior of memory cell array opens and shorts in embedded DRAMs
Tests for resistive and capacitive defects in address decoders
Facilitating automatic test pattern generators using test point insertion
Functional memory faults: a formal notation and a taxonomy
An experimental analysis of spot defects in SRAMs: realistic fault models and test
Impact of memory cell array bridges on the faulty behavior in embedded
Test point insertion for compact test sets
Testing address decoder faults in two-port memories: fault models, test, consequences of port restrictions, and test strategy
March tests for realistic faults in two-port memories
Industrial evaluation of DRAM SIMM tests
Testability of the Philips 80C51 micro-controller
March tests for word-oriented two-port memories
Logical fault detection of CMOS SRAM ICs based on write quiescent supply current
Designing a memory module tester
Port interference faults in two-port memories
Industrial evaluation of DRAM tests
Industrial evaluation of stress combinations for march tests applied to SRAMs
Defining SRAM resistive defects and their simulation stimuli
Illegal state space identification for sequential circuit test generation
