To achieve technical compliance with the Specific Operations Risk Assessment (SORA) framework is a significant challenge for Beyond Visual Line of Sight (BVLOS) drone operations. A reliable Command, Control, and Communication (C3) Data Link that meets SORA regulations is crucial for integrating drones safely in sectors that face high risk and labour shortages, such as inspection of long power transmission lines and wind turbines. In this work, we focus on C2 design aspects of an in-house data link tailored to BVLOS drone operations. Central to our design approach is the operational and mission capability diagram, which bridges the practical operational needs with key SORA objectives.

We implement a systematic process to translate relevant SORA objectives into quantifiable technical requirements, referencing 3GPP standards and JARUS guidelines. Subsequently, we design a sequence diagram mapping C2 data link functions to operational scenarios, which transforms into a logical architecture supporting modular Models-Based Systems Engineering (MBSE).

We perform test and results show data received by the Ground Control Station (GCS) server increased by threefold while latency reduced by 92\% by making improvements to the Scheduler and Link Manager modules respectively. In addition, we design a Link Manager simulation to offer clear metric visualisation to enable more confidence in operator assessment before physical flight trials. We show using simulations and experiments the benefits of our design. Our proposed framework enables wider drone deployment for BVLOS missions in the Netherlands and across Europe. ... Read more

This thesis details the design of a selection operator used in a Genetic Algorithm. The Genetic Algorithm is used for loudspeaker filter design of three way loudspeakers for which tournament selection was chosen as selection operator. A methodology is proposed and used to tune the parameters of tournament selection, which is based on diversity and fitness of the population. Besides basic tournament selection, two new adaptive selection operators based on tournament selection are proposed to improve its functionality. The first adaptive selection operator uses noise proportional to the fitness variance of the population to improve the efficiency of the genetic algorithm. The second adaptive selection operator uses a convergence stage to speed up the convergence towards the optimal filter. After the presented tuning process in this thesis, the latter adaptive selection operator was found to perform better. The optimal selection operator and parameters found in this thesis will not translate to every application, because they heavily depend on the design and the application of the genetic algorithm. However, the presented comparison of selection operators, the provided performance metrics and design methodology can still be used to guide the choice and the tuning process of a selection operator used in any genetic algorithm. ... Read more

This paper reports the design of a part of a genetic algorithm, which is made to design analog filters for loudspeakers. The part in this report is the part which deals with the representation of electrical filter circuits, the mutation of these filters, and finding their transfer function. The considered representations are graph coding and a tree data structure. They are compared on intuitiveness, how well mutations can be performed, and the complexity of calculating the transfer function. The tree structure is reasoned to be the most suitable. Described is which mutations can be performed on a filter by the final program, as well as how embryo circuits are made, how the transfer function is calculated, and which hyperparameters were designed and how they were set. Finally, the design is implemented using Python and the operations are tested. ... Read more

The current COVID-19 pandemic shows the necessity of personal protective equipment and face masks. In the project, a filter module with an in-situ ultraviolet-sterilization technique is designed that can serve as a new kind of smart personal protective equipment (SPPE). This technique is not used in wearable devices as of yet. The project thus aims to take the next step into the future of facemasks. The complete SPPE design is split into three submodules. In this thesis, the Sensing and Control submodule is designed. The Sensing and Control submodule is divided into three parts as well. In the first part of the design, a negative feedback control loop is developed. A photodiode transimpedance amplifier circuit provides the feedback, and the controller is programmed on a microcontroller. The control parameters are derived from a model in Simulink. In the second part of the design, the temperature and relative humidity are measured to transform the control loop’s reference value into a reference function. In the third part of the design, an estimation of the filter state of health is made by measuring the pressure drop over the filter material. Additionally, the airflow in the SPPE is calculated using equations from fluid mechanics to set the maximum allowable pressure drop. At the end of the thesis, the Sensing and Control submodule allows the SPPE to measure environmental conditions, control the ultraviolet intensity accordingly, and indicate if the filter requires replacement. The design is finalized with printed circuit board designs and an algorithm. With the design of the Sensing and Control submodule, the next step is taken towards the future of face masks. ... Read more

The Smart Personal Protective Equipment (SPPE) is proposed as a result of the COVID-19 pandemic, which has led to shortages of standard face masks. This thesis describes one of the three subsystems of the SPPE, namely the Ultraviolet Germicidal Irradiation (UVGI). The UVGI subsystem provides the SPPE with an in situ disinfection system, in order to prolong the period in which the filters of the SPPE can be used to at least 8 hours. The UVGI is implemented by the use of UV LEDs. This implementation is done in two steps. Step one is a simulation which allows for the optimization of the LED placement depending on a multitude of parameters, including: distance between the LEDs and the filter, and the LED tilt angle. The second step is the design of a driver circuit, to allow for the adjustment of the dose applied by the LEDs. The simulation resulted in an LED array which offers the most optimal irradiation of the filter surface. The driver circuit has been designed, simulated to verify its functionality, and implemented in the form of a PCB design. The UVGI subsystem provides the SPPE with an in situ disinfection system by delivering a base dose of 305 mJ/cm2 and a driver circuit which allows for adjusting this dose, should this be desired. The UVGI subsystem should be able to extend the period in which the filters of the SPPE can be used to at least 8 hours. However, due to the restriction of not being allowed to create a prototype this has not yet been verified. ... Read more

In the field of automotive technology, the last decade has seen a rise in projects focusing on self driving vehicles. With this renewed interest from the industry and academic world, new solutions to improve the reliability and safety of these vehicles are required. In this thesis, a new method for information sharing between different vehicles is discussed. This method makes use of radar devices, already in use in the automotive sector for obstacles detection. More specifically, a communication channel will be created between two frequency modulated continuous wave (FMCW) radar devices, using the same waveform utilized for radar sensing. This work will focus on the obstacles to overcome in order to achieve correct data transmission between two radar devices. Different solutions will be evaluated, and a working system, achieving data transmission, will be implemented using radar evaluation boards provided by NXP semiconductors. ... Read more

Real-time systems are bound to timing constraints. These constraints are meant to ensure that the application exhibits predictable behavior by having bounded response times. The worst case execution time (WCET) is an important property of programs, which must be bounded to allow for a response time analysis of tasks. While estimation of the WCET is a difficult problem, modern commercial off-the-shelf processors with multiple processor cores make the WCET estimation problem even harder to solve, because of the existence of shared hardware resource contention among co-running tasks. This work proposes a parametric WCET estimation tool, with which configurable and reproducible experiments can be created to investigate the co-runners’ problem for specific task sets. The created tool runs on two hardware platforms, both featuring ARM Cortex quad core processors. Three different benchmarks suites are implemented in the tool, which can be configured to run in arbitrary combinations on the processor cores. These are a set of synthetic benchmarks meant to stress the memory system, a subset of the Mälardalen WCET benchmark suite and a subset of the San Diego vision benchmark suite. The value of the tool is demonstrated through three sets of experiments. With these experiments, the effects of shared hardware resources are investigated in detail. We show that the experienced slowdown is highly dependent on multiple factors. First, a major factor is the sensitivity to the co-runners’ effects of the task itself. Two extremes are investigated, from a task being insensitive to a task being highly sensitive. Another factor is the size of the input data, which is shown to be a major contributor to the experienced slowdown. Finally, we evaluate the delayed execution of co-running tasks, which in some cases has a significant effect on the experienced slowdown. When we consider a task’s slowdown as a function of the delayed execution of its co-runners, the knowledge on this function’s behavior for specific tasks provides an optimization strategy that could be used to mitigate the problem of shared hardware resource contention. ... Read more

Modular exponentiation is the basis needed to perform RSA encryption and decryption. Execution of 4096-bit modular exponentiation using an embedded system requires many arithmetic operations. This work aims to improve the performance of modular exponentiation for an existing FPGA platform containing a soft core RISC-V processor. The solution is to introduce a peripheral that performs Montgomery multiplication with 4096-bit operands. These operands are represented using the Residue Number System (RNS) and each residue is assigned to a RNS processor core. In total, the system consists of 121 RNS cores and each core is responsible for a 34-bit residue. RNS Montgomery multiplication requires a base extension algorithm, which will be represented by the Bajard and the Shenoy base extensions. Two designs are proposed: one using a tree-based reduction circuit and one with an iterative reduction circuit. The former focuses on performance overall, while the latter is more efficient in terms of performance per area. Synthesis for a XCKU035 FPGA gives an area usage of 83484 LUTs for the tree-based design and 41857 LUTs for the iterative design. Both designs also require 132.5 BRAMs and 485 DSP blocks and are running at a clock frequency of 400 MHz. The tree-based design performs Montgomery multiplication using 4096-bit operands in 434 cycles (1.09 µs), while the iterative design does that in 577 cycles (1.44 µs). For performing modular exponentiation, the sliding window method is used with an optimal window size of seven. A modular exponentiation with 4096-bit operands takes on average 5.09 ms for the tree-based design, while the iterative version needs 6.78 ms. Few other implementations were found performing Montgomery multiplication using 4096-bit operands. However, compared to those the proposed design provides better performance. ... Read more

Most current proximity sensing methods fail the stringent requirements of modern smartphones. A position-sensing device (PSD) requires a laser placed some distance away from the sensor, intensity-based solutions are sensitive to changes in reflectivity, and ultrasound-based sensors cannot measure small distances because of resonance. With modern transistors getting smaller and smaller, single-photon detectors have become feasible. Using a single-photon detector called a SPAD and a laser, the travel time of light can be measured. This technique, called time-of-flight, existed for several decades where radar and ultrasound are concerned but only recently includes single-photon detectors. Several products exist that use single-photon time of flight to measure proximity. However, they are limited in terms of maximum distance, resolution and ambient light tolerance. The question arises what the best possible performance of such a system is. For radar and ultrasound, this has been calculated long ago already, but for time of flight, no such analysis exists. This analysis is the main contribution of this thesis. A formula is calculated that takes all parameters of the system into account and produces an expected standard error. This formula is verified using a simulator. The effect of an increasing opening angle of laser and SPAD is analyzed, as well as different waveforms of the laser, using multiple SPADs in smart ways, and increasing the time of a single measurement. It is shown that when less than a thousand SPADs are used, no smart way of combining hits on different SPADs exists. The waveform emitted by a laser is typically a mix of a sine, a square wave and some effects resembling RC-behavior. The nearer to a square wave this is, the smaller the resulting standard error is. The most power-hungry aspect of such a proximity sensing solution is often the time discretization device. To obtain a high resolution in the order of millimeters, the time resolution should be in the order of picoseconds. Such an extremely high resolution, below the switching time of a single transistor, can typically only be obtained by trading trade area, power and read-out time for resolution. This thesis analyzes a solution using a low-resolution time-to-digital converter (TDC) and multiple sub-intervals for a shorter time to increase resolution. ... Read more

Mobile robots need to be fully autonomous in order to perform their tasks inside their environment. To do that, robots need to have an understanding of their environment, so that they can successfully localize and navigate themselves within it. The understanding of the robots' environment is created by solving the SLAM (Simultaneous Localization And Mapping) problem. The SLAM problem is usually approached using probabilistic laws; both the robot's path and the environment are estimated and represented by probability distributions.

The estimate of the environment is incorporated into a map, which could either be one global map or a network of smaller connected local maps. In small areas where the sensors' errors and inaccuracies remain low, the creation of one global map is preferred. However, as the area grows larger, the global map becomes inaccurate due to accumulated errors. Therefore the strategy of creating a network of local maps is employed. Even though this strategy produces low error results, there is still a limit beyond which it does not scale. Specifically, as the mapping area grows even wider, the number of local maps increases which in turn causes the amount of required memory to increase. In addition, when it comes to loop closure or in other words the procedure of estimating whether the robot returned to a previously visited point in the map, the required computational power increases linearly or sometimes quadratically with respect to the number of local maps.

Consequently, SLAM algorithms suffer from scalability problems, especially when the mapping area becomes too large. Since robots are real-world devices, mapping solutions should be efficient and applicable to the robot's resources, even when these resources are limited.

In this thesis we propose a framework which addresses this scalability issue, aiming to reduce the computational needs and memory usage during the SLAM procedure. Additionally, our framework intends to facilitate loop closure, which can become troublesome in large environments.

Our framework uses multiple sensors and creates a network of hierarchically structured local maps. In order to assess our framework, we compare it to a technique which produces a network of non-hierarchically structured local maps. Our experiments show that in large areas our framework works ideally; the speedup is encouraging and the RAM memory overhead is negligible or conditionally lower. ... Read more