Y. Zhao
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1
Optimization of Rear Reflectors for Enhanced Infrared Response in Silicon Heterojunction Solar Cells
Pushing the limits of infrared light harvesting in silicon solar cells
Silicon heterojunction (SHJ) solar cells have emerged as one of the most promising photovoltaic technologies due to their record-high power conversion efficiencies and excellent surface passivation. However, their short-circuit current density (JSC) is limited due to the parasitic absorption, which includes the loss of near-infrared (NIR) by the rear contact. Free-carrier absorption (FCA) in the transparent conductive oxide (TCO) layers and plasmonic absorption in the rear metal electrode govern the infrared (IR) parasitic absorption losses in conventional transparent conductive oxide (TCO)/silver (Ag) rear reflectors of SHJ solar cells. Increasing the TCO thickness suppresses plasmonic absorption by increasing the distance between the Ag back contact and the silicon absorber; however, it simultaneously leads to higher free-carrier absorption (FCA).
This trade-off has been mitigated in previous studies by combining a thin TCO layer and a thick localized dielectric layer in order to reduce total IR parasitic absorption. The dielectric layer reduces the penetration of the evanescent waves into the Ag reflector, which are responsible for exciting surface plasmon polaritons and causing parasitic optical absorption. At the same time, the thin TCO layer minimizes FCA. Although this concept has demonstrated promising results, the optimization of localized rear reflector geometries remains largely unexplored. This is particularly relevant for rear-junction (RJ) SHJ solar cells, in which the low lateral mobility of holes places greater importance on efficient rear-contact design and carrier collection.
In this work, photolithography was used to fabricate RJ SHJ solar cells featuring localized rear reflectors to enhance their IR response. Different solar cell architectures were explored, demonstrating that utilizing a patterned SiOx dielectric layer reduced the parasitic absorption, further improving the IR response. The best optical-electrical performance was achieved using a 30 nm rear ITO combined with a 300 nm SiOx layer, which is attributed to the trade-off between FCA and plasmonic absorption, reaching a power conversion efficiency of 22.11%. Rear ITO-free configurations were tested without a dielectric layer, showcasing similar Fill Factor (FF) to the reference cells. However, when the SiOx layer was introduced, contact localization was formed, leading to significantly degraded FF due to the low hole lateral mobility. For this case, pitch engineering showed a trend of increased FF when pitch is reduced, however, further development is needed. The proposed localized rear reflector architecture therefore provides a promising route towards further improving the performance of rear-junction SHJ solar cells, with potential applications in next-generation tandem solar cells employing SHJ as the bottom cell.
...
This trade-off has been mitigated in previous studies by combining a thin TCO layer and a thick localized dielectric layer in order to reduce total IR parasitic absorption. The dielectric layer reduces the penetration of the evanescent waves into the Ag reflector, which are responsible for exciting surface plasmon polaritons and causing parasitic optical absorption. At the same time, the thin TCO layer minimizes FCA. Although this concept has demonstrated promising results, the optimization of localized rear reflector geometries remains largely unexplored. This is particularly relevant for rear-junction (RJ) SHJ solar cells, in which the low lateral mobility of holes places greater importance on efficient rear-contact design and carrier collection.
In this work, photolithography was used to fabricate RJ SHJ solar cells featuring localized rear reflectors to enhance their IR response. Different solar cell architectures were explored, demonstrating that utilizing a patterned SiOx dielectric layer reduced the parasitic absorption, further improving the IR response. The best optical-electrical performance was achieved using a 30 nm rear ITO combined with a 300 nm SiOx layer, which is attributed to the trade-off between FCA and plasmonic absorption, reaching a power conversion efficiency of 22.11%. Rear ITO-free configurations were tested without a dielectric layer, showcasing similar Fill Factor (FF) to the reference cells. However, when the SiOx layer was introduced, contact localization was formed, leading to significantly degraded FF due to the low hole lateral mobility. For this case, pitch engineering showed a trend of increased FF when pitch is reduced, however, further development is needed. The proposed localized rear reflector architecture therefore provides a promising route towards further improving the performance of rear-junction SHJ solar cells, with potential applications in next-generation tandem solar cells employing SHJ as the bottom cell.
...
Silicon heterojunction (SHJ) solar cells have emerged as one of the most promising photovoltaic technologies due to their record-high power conversion efficiencies and excellent surface passivation. However, their short-circuit current density (JSC) is limited due to the parasitic absorption, which includes the loss of near-infrared (NIR) by the rear contact. Free-carrier absorption (FCA) in the transparent conductive oxide (TCO) layers and plasmonic absorption in the rear metal electrode govern the infrared (IR) parasitic absorption losses in conventional transparent conductive oxide (TCO)/silver (Ag) rear reflectors of SHJ solar cells. Increasing the TCO thickness suppresses plasmonic absorption by increasing the distance between the Ag back contact and the silicon absorber; however, it simultaneously leads to higher free-carrier absorption (FCA).
This trade-off has been mitigated in previous studies by combining a thin TCO layer and a thick localized dielectric layer in order to reduce total IR parasitic absorption. The dielectric layer reduces the penetration of the evanescent waves into the Ag reflector, which are responsible for exciting surface plasmon polaritons and causing parasitic optical absorption. At the same time, the thin TCO layer minimizes FCA. Although this concept has demonstrated promising results, the optimization of localized rear reflector geometries remains largely unexplored. This is particularly relevant for rear-junction (RJ) SHJ solar cells, in which the low lateral mobility of holes places greater importance on efficient rear-contact design and carrier collection.
In this work, photolithography was used to fabricate RJ SHJ solar cells featuring localized rear reflectors to enhance their IR response. Different solar cell architectures were explored, demonstrating that utilizing a patterned SiOx dielectric layer reduced the parasitic absorption, further improving the IR response. The best optical-electrical performance was achieved using a 30 nm rear ITO combined with a 300 nm SiOx layer, which is attributed to the trade-off between FCA and plasmonic absorption, reaching a power conversion efficiency of 22.11%. Rear ITO-free configurations were tested without a dielectric layer, showcasing similar Fill Factor (FF) to the reference cells. However, when the SiOx layer was introduced, contact localization was formed, leading to significantly degraded FF due to the low hole lateral mobility. For this case, pitch engineering showed a trend of increased FF when pitch is reduced, however, further development is needed. The proposed localized rear reflector architecture therefore provides a promising route towards further improving the performance of rear-junction SHJ solar cells, with potential applications in next-generation tandem solar cells employing SHJ as the bottom cell.
This trade-off has been mitigated in previous studies by combining a thin TCO layer and a thick localized dielectric layer in order to reduce total IR parasitic absorption. The dielectric layer reduces the penetration of the evanescent waves into the Ag reflector, which are responsible for exciting surface plasmon polaritons and causing parasitic optical absorption. At the same time, the thin TCO layer minimizes FCA. Although this concept has demonstrated promising results, the optimization of localized rear reflector geometries remains largely unexplored. This is particularly relevant for rear-junction (RJ) SHJ solar cells, in which the low lateral mobility of holes places greater importance on efficient rear-contact design and carrier collection.
In this work, photolithography was used to fabricate RJ SHJ solar cells featuring localized rear reflectors to enhance their IR response. Different solar cell architectures were explored, demonstrating that utilizing a patterned SiOx dielectric layer reduced the parasitic absorption, further improving the IR response. The best optical-electrical performance was achieved using a 30 nm rear ITO combined with a 300 nm SiOx layer, which is attributed to the trade-off between FCA and plasmonic absorption, reaching a power conversion efficiency of 22.11%. Rear ITO-free configurations were tested without a dielectric layer, showcasing similar Fill Factor (FF) to the reference cells. However, when the SiOx layer was introduced, contact localization was formed, leading to significantly degraded FF due to the low hole lateral mobility. For this case, pitch engineering showed a trend of increased FF when pitch is reduced, however, further development is needed. The proposed localized rear reflector architecture therefore provides a promising route towards further improving the performance of rear-junction SHJ solar cells, with potential applications in next-generation tandem solar cells employing SHJ as the bottom cell.
Nanopyramidal Texturing of c-Si Wafers for Silicon Heterojunction Bottom Cells in Perovskite–Silicon Tandems
Process development, SEM-based morphology analysis and SHJ test-structure validation of advanced wet-chemical c-Si textures
Perovskite–silicon tandem solar cells can exceed the single-junction silicon efficiency limit by combining a wide-bandgap perovskite top cell with a crystalline-silicon bottom cell, but the silicon bottom cell must absorb transmitted long-wavelength light efficiently while remaining compatible with the thin layers deposited above it. Since surface texturing reduces reflection and improves light trapping but conventional micrometre-scale pyramids can be too large for conformal perovskite deposition, this thesis investigates wet-chemical nanopyramidal texturing of double-side-textured c-Si wafers for silicon heterojunction (SHJ) bottom-cell test structures.
A standard KOH–MonoTEX H2.6 texturing process and a silicate-assisted KOH–K2SiO3–MonoTEX H2.6 nanotexturing process were developed and compared, with the resulting surface morphology quantified using an improved semi-automated Pyramid Height Estimation tool applied to top-view scanning electron microscopy images. The tool extracts pyramid-height distributions, including the mean height and the 95th-percentile height, h95, defined as the height below which 95% of the detected pyramids fall. These morphology metrics were combined with average reflectance measurements over 300–1200 nm. Selected textures were then processed into symmetric SHJ bottom-cell test structures with (i )/(n) and (i )/(p) Si-based thin-film stacks. These symmetric structures do not represent complete solar cells, but isolate whether each
texture can be passivated and contacted under the selected SHJ process flow. Their electrical quality was evaluated by measuring the effective minority-carrier lifetime after PECVD deposition of these stacks, after ITO sputtering and after annealing, followed by effective contact-resistivity extraction after metallisation.
The pre-texturing nitric acid oxidation cycle (NAOC) was essential for obtaining uniformwet-etched surfaces and reducing untextured regions. For standard KOH–MonoTEX texturing, increasing the bath temperature from 70 to 80 ◦C improved the average reflectance, whereas increasing theMonoTEX H2.6 volume from 30 to 50mL did not further improve the optical response. The selected standard texture, obtained after 8 min at 80 ◦C with 30 mLMonoTEX H2.6, achieved the lowest standard-texture average reflectance of 14.956% over
300–1200 nm and served as the optical benchmark. For silicate-assisted nanotexturing, K2SiO3 moderated pyramid growth and enabled sub-micrometre mean heights, with the 10 min process at 70 ◦C using 50 mL MonoTEX H2.6 and 55/110 g KOH/K2SiO3 providing the best balance between morphology and optics: side-averaged mean heights of 0.682 and 0.702 μm on the front and rear sides, h95 = 1.327 μm on both sides, and an average reflectance of 15.826%.
The electrical characterisation showed that the selected textures could be processed into SHJ bottom-cell test structures withmeasurable passivation and contact-resistivity performance. Valid n-type structures reached effective minority-carrier lifetimes above 20 ms after PECVD, while p-type structures showed lower recovered lifetimes of approximately 2–4 ms, consistent with the stronger process sensitivity of the investigated p-type contact stack. ITO sputtering caused a strong temporary lifetime loss, but annealing recovered a substantial part of the lost passivation quality. The extracted effective contact resistivities did not show a simple dependence on nanotexturing time or pyramid height, but were more strongly influenced by contact-stack and run-to-run variation, with valid n-type values mainly between 80 and 120mΩ·cm^2 and valid p-type values spanning approximately 64–141mΩ·cm^2.
Overall, the selected standard texture remains the lowest-reflectance benchmark, whereas the 10 min silicate-assisted nanotexture provides the best tandem-oriented compromise between reduced pyramid height, controlled upper-tail morphology, optical response, recovered passivation quality and effective contact resistivity. Further work should increase the sample size, validate SEM-based height estimates with direct three-dimensional measurements, and improve bath-conditioning and PECVD reproducibility.
Beyond the symmetric test structures studied here, controlled nanotextured c-Si surfaces have also been reported in approximately 31% perovskite–silicon tandem devices and, outside photovoltaics, as nanotextured Si/SiO2 templates for low-impedance multilayer graphene neural electrodes [1], [2]. ...
A standard KOH–MonoTEX H2.6 texturing process and a silicate-assisted KOH–K2SiO3–MonoTEX H2.6 nanotexturing process were developed and compared, with the resulting surface morphology quantified using an improved semi-automated Pyramid Height Estimation tool applied to top-view scanning electron microscopy images. The tool extracts pyramid-height distributions, including the mean height and the 95th-percentile height, h95, defined as the height below which 95% of the detected pyramids fall. These morphology metrics were combined with average reflectance measurements over 300–1200 nm. Selected textures were then processed into symmetric SHJ bottom-cell test structures with (i )/(n) and (i )/(p) Si-based thin-film stacks. These symmetric structures do not represent complete solar cells, but isolate whether each
texture can be passivated and contacted under the selected SHJ process flow. Their electrical quality was evaluated by measuring the effective minority-carrier lifetime after PECVD deposition of these stacks, after ITO sputtering and after annealing, followed by effective contact-resistivity extraction after metallisation.
The pre-texturing nitric acid oxidation cycle (NAOC) was essential for obtaining uniformwet-etched surfaces and reducing untextured regions. For standard KOH–MonoTEX texturing, increasing the bath temperature from 70 to 80 ◦C improved the average reflectance, whereas increasing theMonoTEX H2.6 volume from 30 to 50mL did not further improve the optical response. The selected standard texture, obtained after 8 min at 80 ◦C with 30 mLMonoTEX H2.6, achieved the lowest standard-texture average reflectance of 14.956% over
300–1200 nm and served as the optical benchmark. For silicate-assisted nanotexturing, K2SiO3 moderated pyramid growth and enabled sub-micrometre mean heights, with the 10 min process at 70 ◦C using 50 mL MonoTEX H2.6 and 55/110 g KOH/K2SiO3 providing the best balance between morphology and optics: side-averaged mean heights of 0.682 and 0.702 μm on the front and rear sides, h95 = 1.327 μm on both sides, and an average reflectance of 15.826%.
The electrical characterisation showed that the selected textures could be processed into SHJ bottom-cell test structures withmeasurable passivation and contact-resistivity performance. Valid n-type structures reached effective minority-carrier lifetimes above 20 ms after PECVD, while p-type structures showed lower recovered lifetimes of approximately 2–4 ms, consistent with the stronger process sensitivity of the investigated p-type contact stack. ITO sputtering caused a strong temporary lifetime loss, but annealing recovered a substantial part of the lost passivation quality. The extracted effective contact resistivities did not show a simple dependence on nanotexturing time or pyramid height, but were more strongly influenced by contact-stack and run-to-run variation, with valid n-type values mainly between 80 and 120mΩ·cm^2 and valid p-type values spanning approximately 64–141mΩ·cm^2.
Overall, the selected standard texture remains the lowest-reflectance benchmark, whereas the 10 min silicate-assisted nanotexture provides the best tandem-oriented compromise between reduced pyramid height, controlled upper-tail morphology, optical response, recovered passivation quality and effective contact resistivity. Further work should increase the sample size, validate SEM-based height estimates with direct three-dimensional measurements, and improve bath-conditioning and PECVD reproducibility.
Beyond the symmetric test structures studied here, controlled nanotextured c-Si surfaces have also been reported in approximately 31% perovskite–silicon tandem devices and, outside photovoltaics, as nanotextured Si/SiO2 templates for low-impedance multilayer graphene neural electrodes [1], [2]. ...
Perovskite–silicon tandem solar cells can exceed the single-junction silicon efficiency limit by combining a wide-bandgap perovskite top cell with a crystalline-silicon bottom cell, but the silicon bottom cell must absorb transmitted long-wavelength light efficiently while remaining compatible with the thin layers deposited above it. Since surface texturing reduces reflection and improves light trapping but conventional micrometre-scale pyramids can be too large for conformal perovskite deposition, this thesis investigates wet-chemical nanopyramidal texturing of double-side-textured c-Si wafers for silicon heterojunction (SHJ) bottom-cell test structures.
A standard KOH–MonoTEX H2.6 texturing process and a silicate-assisted KOH–K2SiO3–MonoTEX H2.6 nanotexturing process were developed and compared, with the resulting surface morphology quantified using an improved semi-automated Pyramid Height Estimation tool applied to top-view scanning electron microscopy images. The tool extracts pyramid-height distributions, including the mean height and the 95th-percentile height, h95, defined as the height below which 95% of the detected pyramids fall. These morphology metrics were combined with average reflectance measurements over 300–1200 nm. Selected textures were then processed into symmetric SHJ bottom-cell test structures with (i )/(n) and (i )/(p) Si-based thin-film stacks. These symmetric structures do not represent complete solar cells, but isolate whether each
texture can be passivated and contacted under the selected SHJ process flow. Their electrical quality was evaluated by measuring the effective minority-carrier lifetime after PECVD deposition of these stacks, after ITO sputtering and after annealing, followed by effective contact-resistivity extraction after metallisation.
The pre-texturing nitric acid oxidation cycle (NAOC) was essential for obtaining uniformwet-etched surfaces and reducing untextured regions. For standard KOH–MonoTEX texturing, increasing the bath temperature from 70 to 80 ◦C improved the average reflectance, whereas increasing theMonoTEX H2.6 volume from 30 to 50mL did not further improve the optical response. The selected standard texture, obtained after 8 min at 80 ◦C with 30 mLMonoTEX H2.6, achieved the lowest standard-texture average reflectance of 14.956% over
300–1200 nm and served as the optical benchmark. For silicate-assisted nanotexturing, K2SiO3 moderated pyramid growth and enabled sub-micrometre mean heights, with the 10 min process at 70 ◦C using 50 mL MonoTEX H2.6 and 55/110 g KOH/K2SiO3 providing the best balance between morphology and optics: side-averaged mean heights of 0.682 and 0.702 μm on the front and rear sides, h95 = 1.327 μm on both sides, and an average reflectance of 15.826%.
The electrical characterisation showed that the selected textures could be processed into SHJ bottom-cell test structures withmeasurable passivation and contact-resistivity performance. Valid n-type structures reached effective minority-carrier lifetimes above 20 ms after PECVD, while p-type structures showed lower recovered lifetimes of approximately 2–4 ms, consistent with the stronger process sensitivity of the investigated p-type contact stack. ITO sputtering caused a strong temporary lifetime loss, but annealing recovered a substantial part of the lost passivation quality. The extracted effective contact resistivities did not show a simple dependence on nanotexturing time or pyramid height, but were more strongly influenced by contact-stack and run-to-run variation, with valid n-type values mainly between 80 and 120mΩ·cm^2 and valid p-type values spanning approximately 64–141mΩ·cm^2.
Overall, the selected standard texture remains the lowest-reflectance benchmark, whereas the 10 min silicate-assisted nanotexture provides the best tandem-oriented compromise between reduced pyramid height, controlled upper-tail morphology, optical response, recovered passivation quality and effective contact resistivity. Further work should increase the sample size, validate SEM-based height estimates with direct three-dimensional measurements, and improve bath-conditioning and PECVD reproducibility.
Beyond the symmetric test structures studied here, controlled nanotextured c-Si surfaces have also been reported in approximately 31% perovskite–silicon tandem devices and, outside photovoltaics, as nanotextured Si/SiO2 templates for low-impedance multilayer graphene neural electrodes [1], [2].
A standard KOH–MonoTEX H2.6 texturing process and a silicate-assisted KOH–K2SiO3–MonoTEX H2.6 nanotexturing process were developed and compared, with the resulting surface morphology quantified using an improved semi-automated Pyramid Height Estimation tool applied to top-view scanning electron microscopy images. The tool extracts pyramid-height distributions, including the mean height and the 95th-percentile height, h95, defined as the height below which 95% of the detected pyramids fall. These morphology metrics were combined with average reflectance measurements over 300–1200 nm. Selected textures were then processed into symmetric SHJ bottom-cell test structures with (i )/(n) and (i )/(p) Si-based thin-film stacks. These symmetric structures do not represent complete solar cells, but isolate whether each
texture can be passivated and contacted under the selected SHJ process flow. Their electrical quality was evaluated by measuring the effective minority-carrier lifetime after PECVD deposition of these stacks, after ITO sputtering and after annealing, followed by effective contact-resistivity extraction after metallisation.
The pre-texturing nitric acid oxidation cycle (NAOC) was essential for obtaining uniformwet-etched surfaces and reducing untextured regions. For standard KOH–MonoTEX texturing, increasing the bath temperature from 70 to 80 ◦C improved the average reflectance, whereas increasing theMonoTEX H2.6 volume from 30 to 50mL did not further improve the optical response. The selected standard texture, obtained after 8 min at 80 ◦C with 30 mLMonoTEX H2.6, achieved the lowest standard-texture average reflectance of 14.956% over
300–1200 nm and served as the optical benchmark. For silicate-assisted nanotexturing, K2SiO3 moderated pyramid growth and enabled sub-micrometre mean heights, with the 10 min process at 70 ◦C using 50 mL MonoTEX H2.6 and 55/110 g KOH/K2SiO3 providing the best balance between morphology and optics: side-averaged mean heights of 0.682 and 0.702 μm on the front and rear sides, h95 = 1.327 μm on both sides, and an average reflectance of 15.826%.
The electrical characterisation showed that the selected textures could be processed into SHJ bottom-cell test structures withmeasurable passivation and contact-resistivity performance. Valid n-type structures reached effective minority-carrier lifetimes above 20 ms after PECVD, while p-type structures showed lower recovered lifetimes of approximately 2–4 ms, consistent with the stronger process sensitivity of the investigated p-type contact stack. ITO sputtering caused a strong temporary lifetime loss, but annealing recovered a substantial part of the lost passivation quality. The extracted effective contact resistivities did not show a simple dependence on nanotexturing time or pyramid height, but were more strongly influenced by contact-stack and run-to-run variation, with valid n-type values mainly between 80 and 120mΩ·cm^2 and valid p-type values spanning approximately 64–141mΩ·cm^2.
Overall, the selected standard texture remains the lowest-reflectance benchmark, whereas the 10 min silicate-assisted nanotexture provides the best tandem-oriented compromise between reduced pyramid height, controlled upper-tail morphology, optical response, recovered passivation quality and effective contact resistivity. Further work should increase the sample size, validate SEM-based height estimates with direct three-dimensional measurements, and improve bath-conditioning and PECVD reproducibility.
Beyond the symmetric test structures studied here, controlled nanotextured c-Si surfaces have also been reported in approximately 31% perovskite–silicon tandem devices and, outside photovoltaics, as nanotextured Si/SiO2 templates for low-impedance multilayer graphene neural electrodes [1], [2].
Adaptation of an Impedance/Capacitance Measurement Setup for Commercial and Laboratory-Scale Solar Cells
Rethinking Measurements for Next-Generation Solar Cells
Bachelor thesis
(2026)
-
C.P.G. Persoon, M.C. Perabo, M.B. Fabriek, C.C.P. Kroep, Y. Zhao, J.C. Ortiz Lizcano, C.J.M. Verhoeven, P.A. Procel Moya
Photovoltaic devices are increasingly relevant not only as energy generators, but also as dynamic electrical components for applications such as sensing and optical communication. This project focused on adapting an impedance and capacitance measurement setup for both commercial-scale and laboratory-scale solar cells. The setup combines a controlled DC bias voltage with a small AC excitation signal and uses lock-in amplifiers to measure the voltage and current response. From these measurements, the impedance and capacitance behaviour of the solar cell can be determined.
In addition to the electrical measurement setup, the illumination system was characterized using spectral irradiance measurements at different LED heights. A height of 20 cm was selected as the preferred reference height when illumination uniformity over the full commercial-scale cell area is most important. A lower height of 10 cm was used for representative electrical validation measurements, because the increased irradiance produced clearer capacitance and impedance results.
To make the setup suitable for repeated use, software was developed as a control and processing layer between the user and the measurement instruments. The software provides a GUI, automates DC and AC measurement routines, processes measured data, calculates power, impedance, admittance and capacitance, and stores the results in CSV files. Reliability features such as retry logic, safety limits, repeated readings, median filtering and rejection of unstable AC measurement points were included to improve consistency.
The adapted setup was successfully used to measure both lab-scale and commercial-scale solar cells over a frequency range of approximately 5 Hz to 10 kHz and within the required DC bias voltage range. The obtained capacitance and impedance curves showed stable and physically meaningful behaviour, comparable to trends reported in the literature. Although limitations remain, the final system provides a functional and user-friendly basis for future solar-cell characterization and research into dynamic photovoltaic behaviour and photovoltatronics applications. ...
In addition to the electrical measurement setup, the illumination system was characterized using spectral irradiance measurements at different LED heights. A height of 20 cm was selected as the preferred reference height when illumination uniformity over the full commercial-scale cell area is most important. A lower height of 10 cm was used for representative electrical validation measurements, because the increased irradiance produced clearer capacitance and impedance results.
To make the setup suitable for repeated use, software was developed as a control and processing layer between the user and the measurement instruments. The software provides a GUI, automates DC and AC measurement routines, processes measured data, calculates power, impedance, admittance and capacitance, and stores the results in CSV files. Reliability features such as retry logic, safety limits, repeated readings, median filtering and rejection of unstable AC measurement points were included to improve consistency.
The adapted setup was successfully used to measure both lab-scale and commercial-scale solar cells over a frequency range of approximately 5 Hz to 10 kHz and within the required DC bias voltage range. The obtained capacitance and impedance curves showed stable and physically meaningful behaviour, comparable to trends reported in the literature. Although limitations remain, the final system provides a functional and user-friendly basis for future solar-cell characterization and research into dynamic photovoltaic behaviour and photovoltatronics applications. ...
Photovoltaic devices are increasingly relevant not only as energy generators, but also as dynamic electrical components for applications such as sensing and optical communication. This project focused on adapting an impedance and capacitance measurement setup for both commercial-scale and laboratory-scale solar cells. The setup combines a controlled DC bias voltage with a small AC excitation signal and uses lock-in amplifiers to measure the voltage and current response. From these measurements, the impedance and capacitance behaviour of the solar cell can be determined.
In addition to the electrical measurement setup, the illumination system was characterized using spectral irradiance measurements at different LED heights. A height of 20 cm was selected as the preferred reference height when illumination uniformity over the full commercial-scale cell area is most important. A lower height of 10 cm was used for representative electrical validation measurements, because the increased irradiance produced clearer capacitance and impedance results.
To make the setup suitable for repeated use, software was developed as a control and processing layer between the user and the measurement instruments. The software provides a GUI, automates DC and AC measurement routines, processes measured data, calculates power, impedance, admittance and capacitance, and stores the results in CSV files. Reliability features such as retry logic, safety limits, repeated readings, median filtering and rejection of unstable AC measurement points were included to improve consistency.
The adapted setup was successfully used to measure both lab-scale and commercial-scale solar cells over a frequency range of approximately 5 Hz to 10 kHz and within the required DC bias voltage range. The obtained capacitance and impedance curves showed stable and physically meaningful behaviour, comparable to trends reported in the literature. Although limitations remain, the final system provides a functional and user-friendly basis for future solar-cell characterization and research into dynamic photovoltaic behaviour and photovoltatronics applications.
In addition to the electrical measurement setup, the illumination system was characterized using spectral irradiance measurements at different LED heights. A height of 20 cm was selected as the preferred reference height when illumination uniformity over the full commercial-scale cell area is most important. A lower height of 10 cm was used for representative electrical validation measurements, because the increased irradiance produced clearer capacitance and impedance results.
To make the setup suitable for repeated use, software was developed as a control and processing layer between the user and the measurement instruments. The software provides a GUI, automates DC and AC measurement routines, processes measured data, calculates power, impedance, admittance and capacitance, and stores the results in CSV files. Reliability features such as retry logic, safety limits, repeated readings, median filtering and rejection of unstable AC measurement points were included to improve consistency.
The adapted setup was successfully used to measure both lab-scale and commercial-scale solar cells over a frequency range of approximately 5 Hz to 10 kHz and within the required DC bias voltage range. The obtained capacitance and impedance curves showed stable and physically meaningful behaviour, comparable to trends reported in the literature. Although limitations remain, the final system provides a functional and user-friendly basis for future solar-cell characterization and research into dynamic photovoltaic behaviour and photovoltatronics applications.
This thesis studies how certain fabrication methods influence the properties of nanocrystalline silicon (nc-Si:H) layer for interdigitated back contact silicon heterojunction (IBC-SHJ) solar cells using MoOx. The study focused on two main objectives: first, characterizing nc-Si:H and amorphous silicon (a-Si:H) layer depositions with hard masks already fabricated in the PVMD group and improving hard mask design, and second, optimizing the hard mask production process and evaluating the resulting layer quality. In the initial phase, Raman spectroscopy and profilometry were used to assess layer properties. The influence of PECVD deposition of nc-Si:H layer with CO2 plasma treatment was investigated. Raman analysis indicated that a CO2 plasma treatment step promotes better crystalline growth in nc-Si:H layers. Profilometry revealed that depositions using old hard masks resulted in finger profiles that deviated from the target rectangular shape, with thicknesses below the desired 50nm and arched walls. To address these limitations, a new hard mask design incorporating 40nm supports on all fingers was developed, preventing structural deformation during deposition.
The second phase addressed production challenges, specifically overheating during dry etching caused by the use of carrier wafers. Introducing an AlSi landing layer enabled etching without a carrier wafer, reducing the number of etching cycles from 625 to 425 and improving hard mask integrity. SEM analysis confirmed smoother edges and more uniform structures with the new process. PECVD depositions of nc-Si:H layer using the improved masks showed significantly enhanced finger profiles, achieving target thickness, steeper walls, and nearly right-angled edges, particularly when combined with CO2 plasma treatment. Photoconductance lifetime measurements further demonstrated that layers produced with the optimized process exhibited longer minority carrier lifetimes, and patterns created with hard masks outperformed those patterned via conventional lithography.
Overall, this work demonstrates that improving the hard mask production process, alongside its design, plays a critical role in enhancing nc-Si:H layer properties, thereby contributing to higher-performance IBC-SHJ solar cells.
...
The second phase addressed production challenges, specifically overheating during dry etching caused by the use of carrier wafers. Introducing an AlSi landing layer enabled etching without a carrier wafer, reducing the number of etching cycles from 625 to 425 and improving hard mask integrity. SEM analysis confirmed smoother edges and more uniform structures with the new process. PECVD depositions of nc-Si:H layer using the improved masks showed significantly enhanced finger profiles, achieving target thickness, steeper walls, and nearly right-angled edges, particularly when combined with CO2 plasma treatment. Photoconductance lifetime measurements further demonstrated that layers produced with the optimized process exhibited longer minority carrier lifetimes, and patterns created with hard masks outperformed those patterned via conventional lithography.
Overall, this work demonstrates that improving the hard mask production process, alongside its design, plays a critical role in enhancing nc-Si:H layer properties, thereby contributing to higher-performance IBC-SHJ solar cells.
...
This thesis studies how certain fabrication methods influence the properties of nanocrystalline silicon (nc-Si:H) layer for interdigitated back contact silicon heterojunction (IBC-SHJ) solar cells using MoOx. The study focused on two main objectives: first, characterizing nc-Si:H and amorphous silicon (a-Si:H) layer depositions with hard masks already fabricated in the PVMD group and improving hard mask design, and second, optimizing the hard mask production process and evaluating the resulting layer quality. In the initial phase, Raman spectroscopy and profilometry were used to assess layer properties. The influence of PECVD deposition of nc-Si:H layer with CO2 plasma treatment was investigated. Raman analysis indicated that a CO2 plasma treatment step promotes better crystalline growth in nc-Si:H layers. Profilometry revealed that depositions using old hard masks resulted in finger profiles that deviated from the target rectangular shape, with thicknesses below the desired 50nm and arched walls. To address these limitations, a new hard mask design incorporating 40nm supports on all fingers was developed, preventing structural deformation during deposition.
The second phase addressed production challenges, specifically overheating during dry etching caused by the use of carrier wafers. Introducing an AlSi landing layer enabled etching without a carrier wafer, reducing the number of etching cycles from 625 to 425 and improving hard mask integrity. SEM analysis confirmed smoother edges and more uniform structures with the new process. PECVD depositions of nc-Si:H layer using the improved masks showed significantly enhanced finger profiles, achieving target thickness, steeper walls, and nearly right-angled edges, particularly when combined with CO2 plasma treatment. Photoconductance lifetime measurements further demonstrated that layers produced with the optimized process exhibited longer minority carrier lifetimes, and patterns created with hard masks outperformed those patterned via conventional lithography.
Overall, this work demonstrates that improving the hard mask production process, alongside its design, plays a critical role in enhancing nc-Si:H layer properties, thereby contributing to higher-performance IBC-SHJ solar cells.
The second phase addressed production challenges, specifically overheating during dry etching caused by the use of carrier wafers. Introducing an AlSi landing layer enabled etching without a carrier wafer, reducing the number of etching cycles from 625 to 425 and improving hard mask integrity. SEM analysis confirmed smoother edges and more uniform structures with the new process. PECVD depositions of nc-Si:H layer using the improved masks showed significantly enhanced finger profiles, achieving target thickness, steeper walls, and nearly right-angled edges, particularly when combined with CO2 plasma treatment. Photoconductance lifetime measurements further demonstrated that layers produced with the optimized process exhibited longer minority carrier lifetimes, and patterns created with hard masks outperformed those patterned via conventional lithography.
Overall, this work demonstrates that improving the hard mask production process, alongside its design, plays a critical role in enhancing nc-Si:H layer properties, thereby contributing to higher-performance IBC-SHJ solar cells.
Unlocking the potential of TCO-free contacts in silicon heterojunction solar cells
An innovation toward sustainable, affordable, and high-efficiency solar cells
Indium tin oxide (ITO) has been extensively used as a transparent conductive oxide (TCO) material due to its excellent optical and electrical properties. The ITO layer is applied on the front and rear sides of the front-back contact (FBC) SHJ cells. As the front TCO layer, ITO provides anti-reflective features and facilitates the lateral transport of electrons. Conversely, a well-engineered rear TCO layer facilitates favorable band alignment for charge carrier collection and enhances the reflection of near-infrared light. However, the consumption of indium for solar cell applications competes with the growing demand across other industries. Furthermore, indium is scarce and expensive, contributing to the increase in capital expenditure. As a result, research into the feasibility of eliminating the TCO layer has gained significant interest in the past few years. While the concept of TCO-free solar cells has been demonstrated in limited studies with efficiencies exceeding 20%, TCO-free FBC-SHJ solar cells employing copper- based metallization remain unexplored. This work extends the TCO-free contacts by integrating the copper-plated metallization on the front side of SHJ cells.
Direct contact between silver and silicon, following the elimination of the TCO layer, fails to withstand wet-chemical processing due to weak adhesion of silver to silicon. A thin titanium layer was introduced between the silicon and silver layers to improve adhesion. In addition, direct metal deposition onto the silicon surface induced sputtering-related defects, which degrade the passivation quality of the solar cells. Thus, the effect of annealing treatment on the surface passivation is studied. Furthermore, annealing plays a crucial role in decreasing the contact resistivity on the front side, which is essential for efficient electron extraction.
In this study, an efficiency of 22.62% was achieved for front TCO-free FBC-SHJ solar cells with copper-plating metallization, attributed to an open-circuit voltage (Voc) of 720 mV and a fill factor (FF) of 80%. It was observed that Voc and FF were influenced by the annealing duration and the thickness of the hydrogenated nanocrystalline silicon oxide layer, respectively. On the other hand, efficiencies of 19.24% are attained for rear TCO-free FBC-SHJ solar cells featuring a localized-area front ITO layer with Ti/Ag back contact, respectively. Electrical characterizations revealed negligible passivation quality degradation upon front TCO localization. However, the introduction of rear Ti interlayer decreased the short-circuit current density (Jsc) due to the lower near-infrared wavelengths reflectivity of titanium compared to silver. Combining the optimized front and rear TCO-free developments yielded a completely TCO-free contact featuring front copper-plated metallization with an efficiency of 21.19%. The device demonstrated good passivation quality, evidenced by Voc exceeding 710 mV and FF above 80%. Future development may consider the feasibility of depositing anti-reflective coating on the rear side to increase the Jsc further. In addition, the stability of TCO-free devices under prolonged light exposure remains a concern, as indicated by a 7% FF relative decrease after 100 hours of continuous illumination.
...
Direct contact between silver and silicon, following the elimination of the TCO layer, fails to withstand wet-chemical processing due to weak adhesion of silver to silicon. A thin titanium layer was introduced between the silicon and silver layers to improve adhesion. In addition, direct metal deposition onto the silicon surface induced sputtering-related defects, which degrade the passivation quality of the solar cells. Thus, the effect of annealing treatment on the surface passivation is studied. Furthermore, annealing plays a crucial role in decreasing the contact resistivity on the front side, which is essential for efficient electron extraction.
In this study, an efficiency of 22.62% was achieved for front TCO-free FBC-SHJ solar cells with copper-plating metallization, attributed to an open-circuit voltage (Voc) of 720 mV and a fill factor (FF) of 80%. It was observed that Voc and FF were influenced by the annealing duration and the thickness of the hydrogenated nanocrystalline silicon oxide layer, respectively. On the other hand, efficiencies of 19.24% are attained for rear TCO-free FBC-SHJ solar cells featuring a localized-area front ITO layer with Ti/Ag back contact, respectively. Electrical characterizations revealed negligible passivation quality degradation upon front TCO localization. However, the introduction of rear Ti interlayer decreased the short-circuit current density (Jsc) due to the lower near-infrared wavelengths reflectivity of titanium compared to silver. Combining the optimized front and rear TCO-free developments yielded a completely TCO-free contact featuring front copper-plated metallization with an efficiency of 21.19%. The device demonstrated good passivation quality, evidenced by Voc exceeding 710 mV and FF above 80%. Future development may consider the feasibility of depositing anti-reflective coating on the rear side to increase the Jsc further. In addition, the stability of TCO-free devices under prolonged light exposure remains a concern, as indicated by a 7% FF relative decrease after 100 hours of continuous illumination.
...
Indium tin oxide (ITO) has been extensively used as a transparent conductive oxide (TCO) material due to its excellent optical and electrical properties. The ITO layer is applied on the front and rear sides of the front-back contact (FBC) SHJ cells. As the front TCO layer, ITO provides anti-reflective features and facilitates the lateral transport of electrons. Conversely, a well-engineered rear TCO layer facilitates favorable band alignment for charge carrier collection and enhances the reflection of near-infrared light. However, the consumption of indium for solar cell applications competes with the growing demand across other industries. Furthermore, indium is scarce and expensive, contributing to the increase in capital expenditure. As a result, research into the feasibility of eliminating the TCO layer has gained significant interest in the past few years. While the concept of TCO-free solar cells has been demonstrated in limited studies with efficiencies exceeding 20%, TCO-free FBC-SHJ solar cells employing copper- based metallization remain unexplored. This work extends the TCO-free contacts by integrating the copper-plated metallization on the front side of SHJ cells.
Direct contact between silver and silicon, following the elimination of the TCO layer, fails to withstand wet-chemical processing due to weak adhesion of silver to silicon. A thin titanium layer was introduced between the silicon and silver layers to improve adhesion. In addition, direct metal deposition onto the silicon surface induced sputtering-related defects, which degrade the passivation quality of the solar cells. Thus, the effect of annealing treatment on the surface passivation is studied. Furthermore, annealing plays a crucial role in decreasing the contact resistivity on the front side, which is essential for efficient electron extraction.
In this study, an efficiency of 22.62% was achieved for front TCO-free FBC-SHJ solar cells with copper-plating metallization, attributed to an open-circuit voltage (Voc) of 720 mV and a fill factor (FF) of 80%. It was observed that Voc and FF were influenced by the annealing duration and the thickness of the hydrogenated nanocrystalline silicon oxide layer, respectively. On the other hand, efficiencies of 19.24% are attained for rear TCO-free FBC-SHJ solar cells featuring a localized-area front ITO layer with Ti/Ag back contact, respectively. Electrical characterizations revealed negligible passivation quality degradation upon front TCO localization. However, the introduction of rear Ti interlayer decreased the short-circuit current density (Jsc) due to the lower near-infrared wavelengths reflectivity of titanium compared to silver. Combining the optimized front and rear TCO-free developments yielded a completely TCO-free contact featuring front copper-plated metallization with an efficiency of 21.19%. The device demonstrated good passivation quality, evidenced by Voc exceeding 710 mV and FF above 80%. Future development may consider the feasibility of depositing anti-reflective coating on the rear side to increase the Jsc further. In addition, the stability of TCO-free devices under prolonged light exposure remains a concern, as indicated by a 7% FF relative decrease after 100 hours of continuous illumination.
Direct contact between silver and silicon, following the elimination of the TCO layer, fails to withstand wet-chemical processing due to weak adhesion of silver to silicon. A thin titanium layer was introduced between the silicon and silver layers to improve adhesion. In addition, direct metal deposition onto the silicon surface induced sputtering-related defects, which degrade the passivation quality of the solar cells. Thus, the effect of annealing treatment on the surface passivation is studied. Furthermore, annealing plays a crucial role in decreasing the contact resistivity on the front side, which is essential for efficient electron extraction.
In this study, an efficiency of 22.62% was achieved for front TCO-free FBC-SHJ solar cells with copper-plating metallization, attributed to an open-circuit voltage (Voc) of 720 mV and a fill factor (FF) of 80%. It was observed that Voc and FF were influenced by the annealing duration and the thickness of the hydrogenated nanocrystalline silicon oxide layer, respectively. On the other hand, efficiencies of 19.24% are attained for rear TCO-free FBC-SHJ solar cells featuring a localized-area front ITO layer with Ti/Ag back contact, respectively. Electrical characterizations revealed negligible passivation quality degradation upon front TCO localization. However, the introduction of rear Ti interlayer decreased the short-circuit current density (Jsc) due to the lower near-infrared wavelengths reflectivity of titanium compared to silver. Combining the optimized front and rear TCO-free developments yielded a completely TCO-free contact featuring front copper-plated metallization with an efficiency of 21.19%. The device demonstrated good passivation quality, evidenced by Voc exceeding 710 mV and FF above 80%. Future development may consider the feasibility of depositing anti-reflective coating on the rear side to increase the Jsc further. In addition, the stability of TCO-free devices under prolonged light exposure remains a concern, as indicated by a 7% FF relative decrease after 100 hours of continuous illumination.
The installed capacity of photovoltaic (PV) technology has increased beyond expectations and is expected to grow even more. One of the most promising PV technologies currently dominating the PV market is the silicon heterojunction (SHJ) solar cells, which hold the highest c-Si single junction efficiency of 27.3% in an interdigitated-back-contacted design. To achieve such high efficiencies, an optimized (i)a-Si:H passivation layer is of great importance. This thesis aims to scale up the lab baseline SHJ technology by optimizing large-area c-Si surface passivation with hydrogenated intrinsic amorphous silicon (i)a-Si:H layers. In view of the development of high-efficiency perovskite/c-Si tandem solar cells, this thesis also covers the development of nanotexture on crystalline silicon (c-Si) wafers used for the bottom cells.
The research for optimization of large-area c-Si passivation with (i)a-Si:H layers first started with obtaining recipes that would deposit uniform (i)a-Si:H layers over M2-sized glasses. The deposition conditions of plasma-enhanced chemical vapor deposition (PECVD) were optimized and various promising recipes that delivered highly uniform (i)a-Si:H layers were obtained. No statistically significant correlation was found between the deposition parameters and the uniformity of the (i)a-Si:H layers.
The passivation quality of the (i)a-Si:H layers was assessed by symmetrically depositing the (i)a-Si:H layers on c-Si wafers and measuring the lifetime. For single-layer passivation strategy, (i)a-Si:H layers prepared with the highly hydrogen-diluted silane (SiH4) resulted in relatively low lifetime values, potentially due to epitaxial growth, while layers deposited with less hydrogen-diluted SiH4 or pure SiH4 resulted in better lifetime values. The best lifetime achieved with single-layer passivation was 8.23 ms. Furthermore, utilizing a bilayer concept that first deposits an ultra-thin (i)a-Si:H layer with pure SiH4 and then stacks on its top a highly hydrogen-diluted (i)a-Si:H layer, can enhance the passivation quality over their single-layer counterparts. With proper selection of the (i)a-Si:H layers that compose the bilayer and the optimum thickness combinations, a lifetime of 16.10 ms was achieved. Moreover, the passivation quality can be further boosted by applying a hydrogen plasma treatment (HPT) of 30 seconds on top of the optimized bilayer. HPT durations longer than 30 seconds resulted in a decrease in lifetime, possibly due to the oversaturation of hydrogen that leads to defect formation. A lifetime as high as 21.53 ms was obtained by combing the bilayer approach and a HPT.
Last but not least, the creation of nanotexture on c-Si wafers was done by anisotropic etching, using KOH, KsSiO3, and surface additive monoTEX 2.6. By varying texturing conditions, namely, temperature and duration, various surface morphologies of c-Si wafers were obtained. According to SEM characterizations, pyramidal features below 1 μm were successfully created mainly thanks to K2SiO3 slowing down the etching rate during the texturing process. The lowest reflectance was obtained by etching the c-Si wafers at 70 °C for 20 minutes. It was also found that K2SiO3 has an extremely slow dissolving rate and the most effective way of dissolving K2SiO3 is by adding KOH and K2SiO3 to DI water at room temperature and heating it to 80 °C while mixing. ...
The research for optimization of large-area c-Si passivation with (i)a-Si:H layers first started with obtaining recipes that would deposit uniform (i)a-Si:H layers over M2-sized glasses. The deposition conditions of plasma-enhanced chemical vapor deposition (PECVD) were optimized and various promising recipes that delivered highly uniform (i)a-Si:H layers were obtained. No statistically significant correlation was found between the deposition parameters and the uniformity of the (i)a-Si:H layers.
The passivation quality of the (i)a-Si:H layers was assessed by symmetrically depositing the (i)a-Si:H layers on c-Si wafers and measuring the lifetime. For single-layer passivation strategy, (i)a-Si:H layers prepared with the highly hydrogen-diluted silane (SiH4) resulted in relatively low lifetime values, potentially due to epitaxial growth, while layers deposited with less hydrogen-diluted SiH4 or pure SiH4 resulted in better lifetime values. The best lifetime achieved with single-layer passivation was 8.23 ms. Furthermore, utilizing a bilayer concept that first deposits an ultra-thin (i)a-Si:H layer with pure SiH4 and then stacks on its top a highly hydrogen-diluted (i)a-Si:H layer, can enhance the passivation quality over their single-layer counterparts. With proper selection of the (i)a-Si:H layers that compose the bilayer and the optimum thickness combinations, a lifetime of 16.10 ms was achieved. Moreover, the passivation quality can be further boosted by applying a hydrogen plasma treatment (HPT) of 30 seconds on top of the optimized bilayer. HPT durations longer than 30 seconds resulted in a decrease in lifetime, possibly due to the oversaturation of hydrogen that leads to defect formation. A lifetime as high as 21.53 ms was obtained by combing the bilayer approach and a HPT.
Last but not least, the creation of nanotexture on c-Si wafers was done by anisotropic etching, using KOH, KsSiO3, and surface additive monoTEX 2.6. By varying texturing conditions, namely, temperature and duration, various surface morphologies of c-Si wafers were obtained. According to SEM characterizations, pyramidal features below 1 μm were successfully created mainly thanks to K2SiO3 slowing down the etching rate during the texturing process. The lowest reflectance was obtained by etching the c-Si wafers at 70 °C for 20 minutes. It was also found that K2SiO3 has an extremely slow dissolving rate and the most effective way of dissolving K2SiO3 is by adding KOH and K2SiO3 to DI water at room temperature and heating it to 80 °C while mixing. ...
The installed capacity of photovoltaic (PV) technology has increased beyond expectations and is expected to grow even more. One of the most promising PV technologies currently dominating the PV market is the silicon heterojunction (SHJ) solar cells, which hold the highest c-Si single junction efficiency of 27.3% in an interdigitated-back-contacted design. To achieve such high efficiencies, an optimized (i)a-Si:H passivation layer is of great importance. This thesis aims to scale up the lab baseline SHJ technology by optimizing large-area c-Si surface passivation with hydrogenated intrinsic amorphous silicon (i)a-Si:H layers. In view of the development of high-efficiency perovskite/c-Si tandem solar cells, this thesis also covers the development of nanotexture on crystalline silicon (c-Si) wafers used for the bottom cells.
The research for optimization of large-area c-Si passivation with (i)a-Si:H layers first started with obtaining recipes that would deposit uniform (i)a-Si:H layers over M2-sized glasses. The deposition conditions of plasma-enhanced chemical vapor deposition (PECVD) were optimized and various promising recipes that delivered highly uniform (i)a-Si:H layers were obtained. No statistically significant correlation was found between the deposition parameters and the uniformity of the (i)a-Si:H layers.
The passivation quality of the (i)a-Si:H layers was assessed by symmetrically depositing the (i)a-Si:H layers on c-Si wafers and measuring the lifetime. For single-layer passivation strategy, (i)a-Si:H layers prepared with the highly hydrogen-diluted silane (SiH4) resulted in relatively low lifetime values, potentially due to epitaxial growth, while layers deposited with less hydrogen-diluted SiH4 or pure SiH4 resulted in better lifetime values. The best lifetime achieved with single-layer passivation was 8.23 ms. Furthermore, utilizing a bilayer concept that first deposits an ultra-thin (i)a-Si:H layer with pure SiH4 and then stacks on its top a highly hydrogen-diluted (i)a-Si:H layer, can enhance the passivation quality over their single-layer counterparts. With proper selection of the (i)a-Si:H layers that compose the bilayer and the optimum thickness combinations, a lifetime of 16.10 ms was achieved. Moreover, the passivation quality can be further boosted by applying a hydrogen plasma treatment (HPT) of 30 seconds on top of the optimized bilayer. HPT durations longer than 30 seconds resulted in a decrease in lifetime, possibly due to the oversaturation of hydrogen that leads to defect formation. A lifetime as high as 21.53 ms was obtained by combing the bilayer approach and a HPT.
Last but not least, the creation of nanotexture on c-Si wafers was done by anisotropic etching, using KOH, KsSiO3, and surface additive monoTEX 2.6. By varying texturing conditions, namely, temperature and duration, various surface morphologies of c-Si wafers were obtained. According to SEM characterizations, pyramidal features below 1 μm were successfully created mainly thanks to K2SiO3 slowing down the etching rate during the texturing process. The lowest reflectance was obtained by etching the c-Si wafers at 70 °C for 20 minutes. It was also found that K2SiO3 has an extremely slow dissolving rate and the most effective way of dissolving K2SiO3 is by adding KOH and K2SiO3 to DI water at room temperature and heating it to 80 °C while mixing.
The research for optimization of large-area c-Si passivation with (i)a-Si:H layers first started with obtaining recipes that would deposit uniform (i)a-Si:H layers over M2-sized glasses. The deposition conditions of plasma-enhanced chemical vapor deposition (PECVD) were optimized and various promising recipes that delivered highly uniform (i)a-Si:H layers were obtained. No statistically significant correlation was found between the deposition parameters and the uniformity of the (i)a-Si:H layers.
The passivation quality of the (i)a-Si:H layers was assessed by symmetrically depositing the (i)a-Si:H layers on c-Si wafers and measuring the lifetime. For single-layer passivation strategy, (i)a-Si:H layers prepared with the highly hydrogen-diluted silane (SiH4) resulted in relatively low lifetime values, potentially due to epitaxial growth, while layers deposited with less hydrogen-diluted SiH4 or pure SiH4 resulted in better lifetime values. The best lifetime achieved with single-layer passivation was 8.23 ms. Furthermore, utilizing a bilayer concept that first deposits an ultra-thin (i)a-Si:H layer with pure SiH4 and then stacks on its top a highly hydrogen-diluted (i)a-Si:H layer, can enhance the passivation quality over their single-layer counterparts. With proper selection of the (i)a-Si:H layers that compose the bilayer and the optimum thickness combinations, a lifetime of 16.10 ms was achieved. Moreover, the passivation quality can be further boosted by applying a hydrogen plasma treatment (HPT) of 30 seconds on top of the optimized bilayer. HPT durations longer than 30 seconds resulted in a decrease in lifetime, possibly due to the oversaturation of hydrogen that leads to defect formation. A lifetime as high as 21.53 ms was obtained by combing the bilayer approach and a HPT.
Last but not least, the creation of nanotexture on c-Si wafers was done by anisotropic etching, using KOH, KsSiO3, and surface additive monoTEX 2.6. By varying texturing conditions, namely, temperature and duration, various surface morphologies of c-Si wafers were obtained. According to SEM characterizations, pyramidal features below 1 μm were successfully created mainly thanks to K2SiO3 slowing down the etching rate during the texturing process. The lowest reflectance was obtained by etching the c-Si wafers at 70 °C for 20 minutes. It was also found that K2SiO3 has an extremely slow dissolving rate and the most effective way of dissolving K2SiO3 is by adding KOH and K2SiO3 to DI water at room temperature and heating it to 80 °C while mixing.
Silicon heterojunction solar cells (SHJ) showed a record efficiency of 26.81%, approaching the theoretical limit of single-junction crystalline silicon (c-Si) solar cells. To further improve the efficiency, a wide bandgap perovskite top cell can be stacked on top of the SHJ bottom cell forming tandem solar cells, which utilize better the solar spectrum. Recently, a record efficiency of 33.70% was achieved for a monolithic two-terminal perovskite/SHJ tandem solar cell. Typically, a transparent conductive oxide (TCO) layer, functioning as the recombination junction, is used to connect the two sub-cells. However, tandem solar cells with this conventional TCO recombination junction often feature high reflection losses originating from the intermediate interfaces between the two sub-cells. Therefore, this master thesis focused on minimizing these intermediate reflection losses by substituting the TCO-based recombination junction with proposed TCO-free recombination junctions.
Firstly, comprehensive optical simulation studies that compared 2T tandem solar cells with various recombination junctions were performed. In the case of single-side-textured (front-side-flat) tandem configuration, as compared to the reference cell with tin-doped indium oxide (ITO) recombination junctions, the use of the more transparent tungsten-doped indium oxide (IWO) allowed an improved implied photocurrent density in the bottom cell (Jimp,bottom) from 18.30 mA/cm2 to 18.70 mA/cm2. Further, by using the TCO-free recombination junction composed of (p)nc-SiOx:H/(n)nc-SiOx:H or (p)nc-Si:H/(n)nc- Si:H, ranges of optimum thickness combinations were discovered, which allowed high Jimp,bottom values of 20.30 mA/cm2 or 19.80 mA/cm2, respectively. Both TCO-free recombination junctions demonstrated enhanced light coupling to the bottom cell thanks to the optimized interference effect at the intermediate interfaces between two sub-cells, minimizing the associated reflection losses. Furthermore, the designs of tandem solar cells featuring various recombination junctions were optimized to reach maximum matched tandem current density. For the reference cell with ITO recombination junction, a matched tandem current density of 19.40 mA/cm2 was obtained, while the use of TCO-free recombination junctions, for instance, 60 nm (p)nc-SiOx:H/ 70 nm (n)nc-SiOx:H or 30 nm (p)nc-Si:H/75 nm (n)nc-Si:H, demonstrated high Jimp,bottom values of 19.80 mA/cm2 and 19.80 mA/cm2, respectively. These results highlight the optical advantageous implementations of proposed TCO-free recombination junctions for monolith tandem solar cells. Similar observations but less significant improvement by using the proposed TCO-free recombination junctions were found in double-side-textured tandem solar cells. This is due to the already minimized reflection losses of the (p)nc-SiOx:H/(n)nc-SiOx:H or (p)nc-Si:H/(n)nc- Si:H configurations (1.3 mA/cm2 and 1.4 mA/cm2 respectively) as a result of the textured front surface.
Based on optical simulation studies conducted on 2T tandem solar cells, the electrical effectiveness of proposed TCO-free recombination junctions was examined by fabricating proof-of-concept single junction single-side-textured SHJ solar cells. First, we focused on the passivation optimization of the flat (100) c-Si surface as it is prone to detrimental epitaxial growth. An impressive minority carrier lifetime of 16.87 ms was achieved by combing (n)nc-Si: H and (i)a-Si: H bi-layer in a symmetrical configuration. Moreover, we also observed, in general, better conductivity when increasing thicknesses of doped nc- SiOx: H layers when they were deposited on glass or (i)a-Si: H coated glass substrates. Eventually, proof-of-concept single junction single-side-textured SHJ solar cells featuring the proposed TCO-free recombination junction were fabricated. According to the optical simulations, various optimum thickness combinations of (p)nc-SiOx: H and (n)nc-SiOx: H or (p)nc-Si: H and (n)nc-Si: H that composes the recombination junction were tested. Overall, the optically promising TCO-free recombination junctions in 2T tandem solar cells also delivered high FF values in proof-of-concept single-junction SHJ solar cells, demonstrating their potential to be implemented to fabricate high-efficiency monolithic 2T tandem solar cells.
...
Firstly, comprehensive optical simulation studies that compared 2T tandem solar cells with various recombination junctions were performed. In the case of single-side-textured (front-side-flat) tandem configuration, as compared to the reference cell with tin-doped indium oxide (ITO) recombination junctions, the use of the more transparent tungsten-doped indium oxide (IWO) allowed an improved implied photocurrent density in the bottom cell (Jimp,bottom) from 18.30 mA/cm2 to 18.70 mA/cm2. Further, by using the TCO-free recombination junction composed of (p)nc-SiOx:H/(n)nc-SiOx:H or (p)nc-Si:H/(n)nc- Si:H, ranges of optimum thickness combinations were discovered, which allowed high Jimp,bottom values of 20.30 mA/cm2 or 19.80 mA/cm2, respectively. Both TCO-free recombination junctions demonstrated enhanced light coupling to the bottom cell thanks to the optimized interference effect at the intermediate interfaces between two sub-cells, minimizing the associated reflection losses. Furthermore, the designs of tandem solar cells featuring various recombination junctions were optimized to reach maximum matched tandem current density. For the reference cell with ITO recombination junction, a matched tandem current density of 19.40 mA/cm2 was obtained, while the use of TCO-free recombination junctions, for instance, 60 nm (p)nc-SiOx:H/ 70 nm (n)nc-SiOx:H or 30 nm (p)nc-Si:H/75 nm (n)nc-Si:H, demonstrated high Jimp,bottom values of 19.80 mA/cm2 and 19.80 mA/cm2, respectively. These results highlight the optical advantageous implementations of proposed TCO-free recombination junctions for monolith tandem solar cells. Similar observations but less significant improvement by using the proposed TCO-free recombination junctions were found in double-side-textured tandem solar cells. This is due to the already minimized reflection losses of the (p)nc-SiOx:H/(n)nc-SiOx:H or (p)nc-Si:H/(n)nc- Si:H configurations (1.3 mA/cm2 and 1.4 mA/cm2 respectively) as a result of the textured front surface.
Based on optical simulation studies conducted on 2T tandem solar cells, the electrical effectiveness of proposed TCO-free recombination junctions was examined by fabricating proof-of-concept single junction single-side-textured SHJ solar cells. First, we focused on the passivation optimization of the flat (100) c-Si surface as it is prone to detrimental epitaxial growth. An impressive minority carrier lifetime of 16.87 ms was achieved by combing (n)nc-Si: H and (i)a-Si: H bi-layer in a symmetrical configuration. Moreover, we also observed, in general, better conductivity when increasing thicknesses of doped nc- SiOx: H layers when they were deposited on glass or (i)a-Si: H coated glass substrates. Eventually, proof-of-concept single junction single-side-textured SHJ solar cells featuring the proposed TCO-free recombination junction were fabricated. According to the optical simulations, various optimum thickness combinations of (p)nc-SiOx: H and (n)nc-SiOx: H or (p)nc-Si: H and (n)nc-Si: H that composes the recombination junction were tested. Overall, the optically promising TCO-free recombination junctions in 2T tandem solar cells also delivered high FF values in proof-of-concept single-junction SHJ solar cells, demonstrating their potential to be implemented to fabricate high-efficiency monolithic 2T tandem solar cells.
...
Silicon heterojunction solar cells (SHJ) showed a record efficiency of 26.81%, approaching the theoretical limit of single-junction crystalline silicon (c-Si) solar cells. To further improve the efficiency, a wide bandgap perovskite top cell can be stacked on top of the SHJ bottom cell forming tandem solar cells, which utilize better the solar spectrum. Recently, a record efficiency of 33.70% was achieved for a monolithic two-terminal perovskite/SHJ tandem solar cell. Typically, a transparent conductive oxide (TCO) layer, functioning as the recombination junction, is used to connect the two sub-cells. However, tandem solar cells with this conventional TCO recombination junction often feature high reflection losses originating from the intermediate interfaces between the two sub-cells. Therefore, this master thesis focused on minimizing these intermediate reflection losses by substituting the TCO-based recombination junction with proposed TCO-free recombination junctions.
Firstly, comprehensive optical simulation studies that compared 2T tandem solar cells with various recombination junctions were performed. In the case of single-side-textured (front-side-flat) tandem configuration, as compared to the reference cell with tin-doped indium oxide (ITO) recombination junctions, the use of the more transparent tungsten-doped indium oxide (IWO) allowed an improved implied photocurrent density in the bottom cell (Jimp,bottom) from 18.30 mA/cm2 to 18.70 mA/cm2. Further, by using the TCO-free recombination junction composed of (p)nc-SiOx:H/(n)nc-SiOx:H or (p)nc-Si:H/(n)nc- Si:H, ranges of optimum thickness combinations were discovered, which allowed high Jimp,bottom values of 20.30 mA/cm2 or 19.80 mA/cm2, respectively. Both TCO-free recombination junctions demonstrated enhanced light coupling to the bottom cell thanks to the optimized interference effect at the intermediate interfaces between two sub-cells, minimizing the associated reflection losses. Furthermore, the designs of tandem solar cells featuring various recombination junctions were optimized to reach maximum matched tandem current density. For the reference cell with ITO recombination junction, a matched tandem current density of 19.40 mA/cm2 was obtained, while the use of TCO-free recombination junctions, for instance, 60 nm (p)nc-SiOx:H/ 70 nm (n)nc-SiOx:H or 30 nm (p)nc-Si:H/75 nm (n)nc-Si:H, demonstrated high Jimp,bottom values of 19.80 mA/cm2 and 19.80 mA/cm2, respectively. These results highlight the optical advantageous implementations of proposed TCO-free recombination junctions for monolith tandem solar cells. Similar observations but less significant improvement by using the proposed TCO-free recombination junctions were found in double-side-textured tandem solar cells. This is due to the already minimized reflection losses of the (p)nc-SiOx:H/(n)nc-SiOx:H or (p)nc-Si:H/(n)nc- Si:H configurations (1.3 mA/cm2 and 1.4 mA/cm2 respectively) as a result of the textured front surface.
Based on optical simulation studies conducted on 2T tandem solar cells, the electrical effectiveness of proposed TCO-free recombination junctions was examined by fabricating proof-of-concept single junction single-side-textured SHJ solar cells. First, we focused on the passivation optimization of the flat (100) c-Si surface as it is prone to detrimental epitaxial growth. An impressive minority carrier lifetime of 16.87 ms was achieved by combing (n)nc-Si: H and (i)a-Si: H bi-layer in a symmetrical configuration. Moreover, we also observed, in general, better conductivity when increasing thicknesses of doped nc- SiOx: H layers when they were deposited on glass or (i)a-Si: H coated glass substrates. Eventually, proof-of-concept single junction single-side-textured SHJ solar cells featuring the proposed TCO-free recombination junction were fabricated. According to the optical simulations, various optimum thickness combinations of (p)nc-SiOx: H and (n)nc-SiOx: H or (p)nc-Si: H and (n)nc-Si: H that composes the recombination junction were tested. Overall, the optically promising TCO-free recombination junctions in 2T tandem solar cells also delivered high FF values in proof-of-concept single-junction SHJ solar cells, demonstrating their potential to be implemented to fabricate high-efficiency monolithic 2T tandem solar cells.
Firstly, comprehensive optical simulation studies that compared 2T tandem solar cells with various recombination junctions were performed. In the case of single-side-textured (front-side-flat) tandem configuration, as compared to the reference cell with tin-doped indium oxide (ITO) recombination junctions, the use of the more transparent tungsten-doped indium oxide (IWO) allowed an improved implied photocurrent density in the bottom cell (Jimp,bottom) from 18.30 mA/cm2 to 18.70 mA/cm2. Further, by using the TCO-free recombination junction composed of (p)nc-SiOx:H/(n)nc-SiOx:H or (p)nc-Si:H/(n)nc- Si:H, ranges of optimum thickness combinations were discovered, which allowed high Jimp,bottom values of 20.30 mA/cm2 or 19.80 mA/cm2, respectively. Both TCO-free recombination junctions demonstrated enhanced light coupling to the bottom cell thanks to the optimized interference effect at the intermediate interfaces between two sub-cells, minimizing the associated reflection losses. Furthermore, the designs of tandem solar cells featuring various recombination junctions were optimized to reach maximum matched tandem current density. For the reference cell with ITO recombination junction, a matched tandem current density of 19.40 mA/cm2 was obtained, while the use of TCO-free recombination junctions, for instance, 60 nm (p)nc-SiOx:H/ 70 nm (n)nc-SiOx:H or 30 nm (p)nc-Si:H/75 nm (n)nc-Si:H, demonstrated high Jimp,bottom values of 19.80 mA/cm2 and 19.80 mA/cm2, respectively. These results highlight the optical advantageous implementations of proposed TCO-free recombination junctions for monolith tandem solar cells. Similar observations but less significant improvement by using the proposed TCO-free recombination junctions were found in double-side-textured tandem solar cells. This is due to the already minimized reflection losses of the (p)nc-SiOx:H/(n)nc-SiOx:H or (p)nc-Si:H/(n)nc- Si:H configurations (1.3 mA/cm2 and 1.4 mA/cm2 respectively) as a result of the textured front surface.
Based on optical simulation studies conducted on 2T tandem solar cells, the electrical effectiveness of proposed TCO-free recombination junctions was examined by fabricating proof-of-concept single junction single-side-textured SHJ solar cells. First, we focused on the passivation optimization of the flat (100) c-Si surface as it is prone to detrimental epitaxial growth. An impressive minority carrier lifetime of 16.87 ms was achieved by combing (n)nc-Si: H and (i)a-Si: H bi-layer in a symmetrical configuration. Moreover, we also observed, in general, better conductivity when increasing thicknesses of doped nc- SiOx: H layers when they were deposited on glass or (i)a-Si: H coated glass substrates. Eventually, proof-of-concept single junction single-side-textured SHJ solar cells featuring the proposed TCO-free recombination junction were fabricated. According to the optical simulations, various optimum thickness combinations of (p)nc-SiOx: H and (n)nc-SiOx: H or (p)nc-Si: H and (n)nc-Si: H that composes the recombination junction were tested. Overall, the optically promising TCO-free recombination junctions in 2T tandem solar cells also delivered high FF values in proof-of-concept single-junction SHJ solar cells, demonstrating their potential to be implemented to fabricate high-efficiency monolithic 2T tandem solar cells.
The photovoltaic (PV) market is currently dominated by crystalline silicon (c-Si) technology, which accounts for 95% of the production. However, the record single-junction c-Si solar cell has achieved a record efficiency of 26.81% approaching the theoretical efficiency limit of 29.43%. In an effort to overcome this barrier, multi-junction devices are being investigated, and perovskite/Si tandem technology is attracting a lot of interest. This is because it is compatible with well-established c-Si technology and is comparatively less expensive. Recently, two-terminal (2T) monolithic tandem devices with a c-Si bottom cell and a perovskite top cell have achieved an impressive 33.7% efficiency. By utilizing a solution-based process it allows for fabricating high-quality perovskite layers. However, problems develop when the bottom cell’s light trapping features exceed the thickness of the perovskite layer. To ensure uniform coverage of high-quality perovskite layer, the light trapping features must be lowered to sub-micrometre (< 1 μm) height.
This thesis investigates three methods for creating sub-micron features on the c-Si bottom cell. The first two approaches include wet-chemical processing from the top-down and bottom-up techniques. Using a poly-Si etch solution, the top-down approach aims to lower the height of large surface features from 3-5 μm to less than 1 μm. This method resulted in substantial reflection losses and poor passivation due to surface-induced roughness, even though the peak height was lowered to 0.9 μm. In order to tackle this issue, an additive was added to the mixture, producing a morphology with a 1.1 μm lower peak height, compared to an initial peak height of 3 μm. Further, the passivation has seen a two-fold increase in minority carrier lifetime. This increase is attributed to the reduced surface roughness that was inspected through SEM images. However, the surface still contained nano-scale features whose origination could be related to the cleaning procedure followed or the (i)a-Si:H layer growth. The second method is a bottom-up approach and uses KOH, K2SiO3, and a surface additive to create sub-micron features on a flat Siwafer. Once the chemical concentrationswere optimized, the peak height was effectively lowered to less than 0.8 μm at an F-ratio of F = 2.0. But, this experiment is conducted at a temperature of 80◦ C. Many non-uniformities in pyramid distribution were observed as well as nano-scale roughness for F-ratio of F=0. This seemed to be resolved with better pyramid homogeneity and reduced nano-scale roughness by lowering the temperature to 70◦ C. While, maintaining a peak height below 0.8 μm at F=2.0. Moreover, this approach also exhibited lower reflection losses which is close to reflection observed from large pyramidal features (˜3μm).
The last method includes the use of lithography to produce 2D periodic inverted nano pyramids. This process flow showed that patterns with critical dimensions close to 100 nm may be transferred using high-throughput nano-imprinting lithography. By using a much rigid soft mold that did not showcase any pattern distortion. However, the limitations in mask opening created issues with the nano-pyramid formation. This further requires the optimization of suitable hard mask layers. To sum up, these methods demonstrate the possibility of producing effective sub-micron features, which is promising for perovskite/Si tandem technological advancements. ...
This thesis investigates three methods for creating sub-micron features on the c-Si bottom cell. The first two approaches include wet-chemical processing from the top-down and bottom-up techniques. Using a poly-Si etch solution, the top-down approach aims to lower the height of large surface features from 3-5 μm to less than 1 μm. This method resulted in substantial reflection losses and poor passivation due to surface-induced roughness, even though the peak height was lowered to 0.9 μm. In order to tackle this issue, an additive was added to the mixture, producing a morphology with a 1.1 μm lower peak height, compared to an initial peak height of 3 μm. Further, the passivation has seen a two-fold increase in minority carrier lifetime. This increase is attributed to the reduced surface roughness that was inspected through SEM images. However, the surface still contained nano-scale features whose origination could be related to the cleaning procedure followed or the (i)a-Si:H layer growth. The second method is a bottom-up approach and uses KOH, K2SiO3, and a surface additive to create sub-micron features on a flat Siwafer. Once the chemical concentrationswere optimized, the peak height was effectively lowered to less than 0.8 μm at an F-ratio of F = 2.0. But, this experiment is conducted at a temperature of 80◦ C. Many non-uniformities in pyramid distribution were observed as well as nano-scale roughness for F-ratio of F=0. This seemed to be resolved with better pyramid homogeneity and reduced nano-scale roughness by lowering the temperature to 70◦ C. While, maintaining a peak height below 0.8 μm at F=2.0. Moreover, this approach also exhibited lower reflection losses which is close to reflection observed from large pyramidal features (˜3μm).
The last method includes the use of lithography to produce 2D periodic inverted nano pyramids. This process flow showed that patterns with critical dimensions close to 100 nm may be transferred using high-throughput nano-imprinting lithography. By using a much rigid soft mold that did not showcase any pattern distortion. However, the limitations in mask opening created issues with the nano-pyramid formation. This further requires the optimization of suitable hard mask layers. To sum up, these methods demonstrate the possibility of producing effective sub-micron features, which is promising for perovskite/Si tandem technological advancements. ...
The photovoltaic (PV) market is currently dominated by crystalline silicon (c-Si) technology, which accounts for 95% of the production. However, the record single-junction c-Si solar cell has achieved a record efficiency of 26.81% approaching the theoretical efficiency limit of 29.43%. In an effort to overcome this barrier, multi-junction devices are being investigated, and perovskite/Si tandem technology is attracting a lot of interest. This is because it is compatible with well-established c-Si technology and is comparatively less expensive. Recently, two-terminal (2T) monolithic tandem devices with a c-Si bottom cell and a perovskite top cell have achieved an impressive 33.7% efficiency. By utilizing a solution-based process it allows for fabricating high-quality perovskite layers. However, problems develop when the bottom cell’s light trapping features exceed the thickness of the perovskite layer. To ensure uniform coverage of high-quality perovskite layer, the light trapping features must be lowered to sub-micrometre (< 1 μm) height.
This thesis investigates three methods for creating sub-micron features on the c-Si bottom cell. The first two approaches include wet-chemical processing from the top-down and bottom-up techniques. Using a poly-Si etch solution, the top-down approach aims to lower the height of large surface features from 3-5 μm to less than 1 μm. This method resulted in substantial reflection losses and poor passivation due to surface-induced roughness, even though the peak height was lowered to 0.9 μm. In order to tackle this issue, an additive was added to the mixture, producing a morphology with a 1.1 μm lower peak height, compared to an initial peak height of 3 μm. Further, the passivation has seen a two-fold increase in minority carrier lifetime. This increase is attributed to the reduced surface roughness that was inspected through SEM images. However, the surface still contained nano-scale features whose origination could be related to the cleaning procedure followed or the (i)a-Si:H layer growth. The second method is a bottom-up approach and uses KOH, K2SiO3, and a surface additive to create sub-micron features on a flat Siwafer. Once the chemical concentrationswere optimized, the peak height was effectively lowered to less than 0.8 μm at an F-ratio of F = 2.0. But, this experiment is conducted at a temperature of 80◦ C. Many non-uniformities in pyramid distribution were observed as well as nano-scale roughness for F-ratio of F=0. This seemed to be resolved with better pyramid homogeneity and reduced nano-scale roughness by lowering the temperature to 70◦ C. While, maintaining a peak height below 0.8 μm at F=2.0. Moreover, this approach also exhibited lower reflection losses which is close to reflection observed from large pyramidal features (˜3μm).
The last method includes the use of lithography to produce 2D periodic inverted nano pyramids. This process flow showed that patterns with critical dimensions close to 100 nm may be transferred using high-throughput nano-imprinting lithography. By using a much rigid soft mold that did not showcase any pattern distortion. However, the limitations in mask opening created issues with the nano-pyramid formation. This further requires the optimization of suitable hard mask layers. To sum up, these methods demonstrate the possibility of producing effective sub-micron features, which is promising for perovskite/Si tandem technological advancements.
This thesis investigates three methods for creating sub-micron features on the c-Si bottom cell. The first two approaches include wet-chemical processing from the top-down and bottom-up techniques. Using a poly-Si etch solution, the top-down approach aims to lower the height of large surface features from 3-5 μm to less than 1 μm. This method resulted in substantial reflection losses and poor passivation due to surface-induced roughness, even though the peak height was lowered to 0.9 μm. In order to tackle this issue, an additive was added to the mixture, producing a morphology with a 1.1 μm lower peak height, compared to an initial peak height of 3 μm. Further, the passivation has seen a two-fold increase in minority carrier lifetime. This increase is attributed to the reduced surface roughness that was inspected through SEM images. However, the surface still contained nano-scale features whose origination could be related to the cleaning procedure followed or the (i)a-Si:H layer growth. The second method is a bottom-up approach and uses KOH, K2SiO3, and a surface additive to create sub-micron features on a flat Siwafer. Once the chemical concentrationswere optimized, the peak height was effectively lowered to less than 0.8 μm at an F-ratio of F = 2.0. But, this experiment is conducted at a temperature of 80◦ C. Many non-uniformities in pyramid distribution were observed as well as nano-scale roughness for F-ratio of F=0. This seemed to be resolved with better pyramid homogeneity and reduced nano-scale roughness by lowering the temperature to 70◦ C. While, maintaining a peak height below 0.8 μm at F=2.0. Moreover, this approach also exhibited lower reflection losses which is close to reflection observed from large pyramidal features (˜3μm).
The last method includes the use of lithography to produce 2D periodic inverted nano pyramids. This process flow showed that patterns with critical dimensions close to 100 nm may be transferred using high-throughput nano-imprinting lithography. By using a much rigid soft mold that did not showcase any pattern distortion. However, the limitations in mask opening created issues with the nano-pyramid formation. This further requires the optimization of suitable hard mask layers. To sum up, these methods demonstrate the possibility of producing effective sub-micron features, which is promising for perovskite/Si tandem technological advancements.
Master thesis
(2022)
-
K. Kovačević, O. Isabella, Y. Zhao, G. Yang, R.A.C.M.M. van Swaaij, S. Vollebregt
Silicon heterojunction (SHJ) solar cells are one of the most promising PV technologies nowadays due to high photoconversion efficiencies and low manufacturing costs. However, standard front/back-contacted (FBC) solar cells feature a front metal grid that brings shading to the front side of the devices, which limits the conversion efficiency of solar cells. One solution is to move metal contacts fully to the back by introducing interdigitated-back-contacted (IBC) architecture. In 2018, IBC-SHJ solar cells achieved a photoconversion efficiency of 26.7% holding a record for single-junction c-Si cells. However, the standard fabrication process of IBC solar cells comes with increased complexity and manufacturing costs. The focus of this research is on developing and optimizing a simple and industry-appealing fabrication process for high-efficiency IBC-SHJ solar cells.
The first part of the project investigates the simple processing of IBC-SHJ solar cells featuring tunneling recombination junction (TRJ). The first tunneling IBC devices are fabricated successfully. However, shunting is observed from the J-V curves of fabricated devices, which can be related to the internal shunting of tunneling IBC architecture and high lateral conductivity of p-type nc-Si:H-based blanket layer. Hence, alternative contact stacks are designed for application in the previously developed flowchart with the aim to minimize the lateral conductivity of the blanket layer and keep the fabrication process simple.
The proposed hole collection contact stack is firstly implemented in the front junction (FJ) FBC solar cells. The FJ FBC devices reach Voc of 704 mV and FF of 79.29% . Rear junction (RJ) FBC solar cells are fabricated featuring a novel electron collection contact stack that is developed within this thesis. Voc of 715 mV and FF of 82.24% are obtained in RJ devices. The results of RJ FBC solar cells with a newly developed contact stack show excellent results in terms of FF, making it a promising candidate for further application in IBC devices. The introduction of the optimized device design enabled the successful fabrication of IBC solar cells with the simple process developed for tunneling IBC devices while ensuring no shunting occurs. Fabricated devices represent a proof-of-concept of the novel configuration, providing a promising starting point for future development.
...
The first part of the project investigates the simple processing of IBC-SHJ solar cells featuring tunneling recombination junction (TRJ). The first tunneling IBC devices are fabricated successfully. However, shunting is observed from the J-V curves of fabricated devices, which can be related to the internal shunting of tunneling IBC architecture and high lateral conductivity of p-type nc-Si:H-based blanket layer. Hence, alternative contact stacks are designed for application in the previously developed flowchart with the aim to minimize the lateral conductivity of the blanket layer and keep the fabrication process simple.
The proposed hole collection contact stack is firstly implemented in the front junction (FJ) FBC solar cells. The FJ FBC devices reach Voc of 704 mV and FF of 79.29% . Rear junction (RJ) FBC solar cells are fabricated featuring a novel electron collection contact stack that is developed within this thesis. Voc of 715 mV and FF of 82.24% are obtained in RJ devices. The results of RJ FBC solar cells with a newly developed contact stack show excellent results in terms of FF, making it a promising candidate for further application in IBC devices. The introduction of the optimized device design enabled the successful fabrication of IBC solar cells with the simple process developed for tunneling IBC devices while ensuring no shunting occurs. Fabricated devices represent a proof-of-concept of the novel configuration, providing a promising starting point for future development.
...
Silicon heterojunction (SHJ) solar cells are one of the most promising PV technologies nowadays due to high photoconversion efficiencies and low manufacturing costs. However, standard front/back-contacted (FBC) solar cells feature a front metal grid that brings shading to the front side of the devices, which limits the conversion efficiency of solar cells. One solution is to move metal contacts fully to the back by introducing interdigitated-back-contacted (IBC) architecture. In 2018, IBC-SHJ solar cells achieved a photoconversion efficiency of 26.7% holding a record for single-junction c-Si cells. However, the standard fabrication process of IBC solar cells comes with increased complexity and manufacturing costs. The focus of this research is on developing and optimizing a simple and industry-appealing fabrication process for high-efficiency IBC-SHJ solar cells.
The first part of the project investigates the simple processing of IBC-SHJ solar cells featuring tunneling recombination junction (TRJ). The first tunneling IBC devices are fabricated successfully. However, shunting is observed from the J-V curves of fabricated devices, which can be related to the internal shunting of tunneling IBC architecture and high lateral conductivity of p-type nc-Si:H-based blanket layer. Hence, alternative contact stacks are designed for application in the previously developed flowchart with the aim to minimize the lateral conductivity of the blanket layer and keep the fabrication process simple.
The proposed hole collection contact stack is firstly implemented in the front junction (FJ) FBC solar cells. The FJ FBC devices reach Voc of 704 mV and FF of 79.29% . Rear junction (RJ) FBC solar cells are fabricated featuring a novel electron collection contact stack that is developed within this thesis. Voc of 715 mV and FF of 82.24% are obtained in RJ devices. The results of RJ FBC solar cells with a newly developed contact stack show excellent results in terms of FF, making it a promising candidate for further application in IBC devices. The introduction of the optimized device design enabled the successful fabrication of IBC solar cells with the simple process developed for tunneling IBC devices while ensuring no shunting occurs. Fabricated devices represent a proof-of-concept of the novel configuration, providing a promising starting point for future development.
The first part of the project investigates the simple processing of IBC-SHJ solar cells featuring tunneling recombination junction (TRJ). The first tunneling IBC devices are fabricated successfully. However, shunting is observed from the J-V curves of fabricated devices, which can be related to the internal shunting of tunneling IBC architecture and high lateral conductivity of p-type nc-Si:H-based blanket layer. Hence, alternative contact stacks are designed for application in the previously developed flowchart with the aim to minimize the lateral conductivity of the blanket layer and keep the fabrication process simple.
The proposed hole collection contact stack is firstly implemented in the front junction (FJ) FBC solar cells. The FJ FBC devices reach Voc of 704 mV and FF of 79.29% . Rear junction (RJ) FBC solar cells are fabricated featuring a novel electron collection contact stack that is developed within this thesis. Voc of 715 mV and FF of 82.24% are obtained in RJ devices. The results of RJ FBC solar cells with a newly developed contact stack show excellent results in terms of FF, making it a promising candidate for further application in IBC devices. The introduction of the optimized device design enabled the successful fabrication of IBC solar cells with the simple process developed for tunneling IBC devices while ensuring no shunting occurs. Fabricated devices represent a proof-of-concept of the novel configuration, providing a promising starting point for future development.
Master thesis
(2021)
-
G. Paggiaro, A.J. Bottger, O. Isabella, Y. Zhao, L. Mazzarella, V. Popovich, Adriana Creatore
Silicon heterojunction (SHJ) solar cells have exhibited efficiencies well above 25%. To further boost the efficiencies of c-Si-based solar cells, high-bandgap perovskite cells are stacked on top achieving a record efficiency of 29.52%. However, as most of the high-quality perovskite films are solution-processed, the front surface of the bottom device should be flat. Therefore, in this work SHJ bottom c-Si cells featuring front-side-flat and rear-side-textured morphology, which delivers high VOC together with excellent near-infrared response, have been optimized as bottom cells for tandem configurations.
Firstly, RF-PECVD deposition conditions of a (i)a-Si: H monolayer for symmetric <100> flat c-Si surfaces were optimized. The optimized (i)a-Si:H monolayer ( 10-nm-thick) was obtained using pure SiH4, which results in rather moderate passivation performances (teff = 1.2ms, i-VOC = 701 mV).
To improve further the passivation quality of monolayer (i)a-Si:H on flat <100> surface, other passivation approaches aiming at incorporating more H without promoting detrimental epitaxial growth have been investigated.
With a bilayer deposition approach, which features firstly a less H-containing (i)a-Si:H to prevent epitaxial growth and then a second H-rich (i)a-Si:H layer, the passivation properties were slightly enhanced to τeff=1.4 ms and i-VOC=704 mV. Subsequently, by combining the bilayer approach with a post HPT, τeff of 2.0
ms and an i-VOC of 714 mV were achieved. Finally, by combining the bilayer approach with an intermediate HPT, the optimal passivation sample was deposited, with τeff of 2.4 ms and an i-VOC of 720 mV on the flat <100> surface.
To gain a better understanding of the correlation between passivation qualities and the microstructure properties of (i)a-Si:H on flat <100> surface, the layers have been characterized mainly via Fourier-transform infrared spectroscopy (FTIR). From the analysis, it can be concluded that the passivation layer that contains
sufficient H and a higher fraction of monohydrides is beneficial for achieving a better passivation quality.
For the two-terminal tandem solar cells, bottom cells with (n)-contact on top are preferred due to the optical advantage of the perovskite top cells with the p-i-n configuration. Therefore, a first tandem cell with (n)a-Si:H has been fabricated in collaboration with TU Eindhoven resulting in 22.2% efficiency. Starting from
this first fabricated tandem cell, its main optical limitations have been identified by performing advanced optical simulations using GenPro4, and the main strategies to overcome these optical drawbacks have been defined. By optimizing the front anti-reflection layers (MgF2 and ITO) thicknesses (at 100 nm and 20 nm, respectively), and reducing C60 thickness from 20 to 10 nm, front reflections, and parasitic absorption can be minimized. Thus a gain of implied photocurrent density of 1.8 mA/cm2 for the tandem cell was obtained.
Further, by implementing (n)nc-SiOx:H doped layer in the SHJ bottom cell, instead of standard (n)a-Si:H layer the reflection between the top and bottom cell is also reduced, and enhanced light incorporation into the bottom cell is obtained. By adopting all the above optimizations and also adjusting the perovskite
layer from 473 nm to 530 nm, a total improvement of 2.7 mA/cm2 in implied photocurrent density with respect to the initial 22.2% tandem cell can be achieved.
After having identified different optically optimized SHJ bottom cells for tandem applications, both rear junction and front junction single-side-textured SHJ solar cells were fabricated. Firstly, the passivation quality of (i)a-Si:H/(n)-layer and (i)a-Si:H/(p)-layer on different (i)a-Si:H were investigated. Then RJ solar cells
with three different (n)-type layers [(n)nc-SiOx:H;(n)nc-Si:H;(n)a-Si:H)] have been fabricated with optimal thicknesses individuated from the tandem optical simulations. Furthermore, a tunnel recombination junction SHJ solar cell with a layer stack of (n)nc-Si:H/(p)nc-SiOx:H/(p)nc-Si:H has been fabricated and measured as well.
In conclusion, various doped contacts (both n- and p-type) were successfully implemented into SHJ solar cells, which delivered VOCs range from 700 to 714 mV and FFs range from 77.8% to 80.9%. Therefore, different well-functioning SHJ solar cells have been developed and are ready to be implemented as bottom cells for high-efficiency tandem devices. ...
Firstly, RF-PECVD deposition conditions of a (i)a-Si: H monolayer for symmetric <100> flat c-Si surfaces were optimized. The optimized (i)a-Si:H monolayer ( 10-nm-thick) was obtained using pure SiH4, which results in rather moderate passivation performances (teff = 1.2ms, i-VOC = 701 mV).
To improve further the passivation quality of monolayer (i)a-Si:H on flat <100> surface, other passivation approaches aiming at incorporating more H without promoting detrimental epitaxial growth have been investigated.
With a bilayer deposition approach, which features firstly a less H-containing (i)a-Si:H to prevent epitaxial growth and then a second H-rich (i)a-Si:H layer, the passivation properties were slightly enhanced to τeff=1.4 ms and i-VOC=704 mV. Subsequently, by combining the bilayer approach with a post HPT, τeff of 2.0
ms and an i-VOC of 714 mV were achieved. Finally, by combining the bilayer approach with an intermediate HPT, the optimal passivation sample was deposited, with τeff of 2.4 ms and an i-VOC of 720 mV on the flat <100> surface.
To gain a better understanding of the correlation between passivation qualities and the microstructure properties of (i)a-Si:H on flat <100> surface, the layers have been characterized mainly via Fourier-transform infrared spectroscopy (FTIR). From the analysis, it can be concluded that the passivation layer that contains
sufficient H and a higher fraction of monohydrides is beneficial for achieving a better passivation quality.
For the two-terminal tandem solar cells, bottom cells with (n)-contact on top are preferred due to the optical advantage of the perovskite top cells with the p-i-n configuration. Therefore, a first tandem cell with (n)a-Si:H has been fabricated in collaboration with TU Eindhoven resulting in 22.2% efficiency. Starting from
this first fabricated tandem cell, its main optical limitations have been identified by performing advanced optical simulations using GenPro4, and the main strategies to overcome these optical drawbacks have been defined. By optimizing the front anti-reflection layers (MgF2 and ITO) thicknesses (at 100 nm and 20 nm, respectively), and reducing C60 thickness from 20 to 10 nm, front reflections, and parasitic absorption can be minimized. Thus a gain of implied photocurrent density of 1.8 mA/cm2 for the tandem cell was obtained.
Further, by implementing (n)nc-SiOx:H doped layer in the SHJ bottom cell, instead of standard (n)a-Si:H layer the reflection between the top and bottom cell is also reduced, and enhanced light incorporation into the bottom cell is obtained. By adopting all the above optimizations and also adjusting the perovskite
layer from 473 nm to 530 nm, a total improvement of 2.7 mA/cm2 in implied photocurrent density with respect to the initial 22.2% tandem cell can be achieved.
After having identified different optically optimized SHJ bottom cells for tandem applications, both rear junction and front junction single-side-textured SHJ solar cells were fabricated. Firstly, the passivation quality of (i)a-Si:H/(n)-layer and (i)a-Si:H/(p)-layer on different (i)a-Si:H were investigated. Then RJ solar cells
with three different (n)-type layers [(n)nc-SiOx:H;(n)nc-Si:H;(n)a-Si:H)] have been fabricated with optimal thicknesses individuated from the tandem optical simulations. Furthermore, a tunnel recombination junction SHJ solar cell with a layer stack of (n)nc-Si:H/(p)nc-SiOx:H/(p)nc-Si:H has been fabricated and measured as well.
In conclusion, various doped contacts (both n- and p-type) were successfully implemented into SHJ solar cells, which delivered VOCs range from 700 to 714 mV and FFs range from 77.8% to 80.9%. Therefore, different well-functioning SHJ solar cells have been developed and are ready to be implemented as bottom cells for high-efficiency tandem devices. ...
Silicon heterojunction (SHJ) solar cells have exhibited efficiencies well above 25%. To further boost the efficiencies of c-Si-based solar cells, high-bandgap perovskite cells are stacked on top achieving a record efficiency of 29.52%. However, as most of the high-quality perovskite films are solution-processed, the front surface of the bottom device should be flat. Therefore, in this work SHJ bottom c-Si cells featuring front-side-flat and rear-side-textured morphology, which delivers high VOC together with excellent near-infrared response, have been optimized as bottom cells for tandem configurations.
Firstly, RF-PECVD deposition conditions of a (i)a-Si: H monolayer for symmetric <100> flat c-Si surfaces were optimized. The optimized (i)a-Si:H monolayer ( 10-nm-thick) was obtained using pure SiH4, which results in rather moderate passivation performances (teff = 1.2ms, i-VOC = 701 mV).
To improve further the passivation quality of monolayer (i)a-Si:H on flat <100> surface, other passivation approaches aiming at incorporating more H without promoting detrimental epitaxial growth have been investigated.
With a bilayer deposition approach, which features firstly a less H-containing (i)a-Si:H to prevent epitaxial growth and then a second H-rich (i)a-Si:H layer, the passivation properties were slightly enhanced to τeff=1.4 ms and i-VOC=704 mV. Subsequently, by combining the bilayer approach with a post HPT, τeff of 2.0
ms and an i-VOC of 714 mV were achieved. Finally, by combining the bilayer approach with an intermediate HPT, the optimal passivation sample was deposited, with τeff of 2.4 ms and an i-VOC of 720 mV on the flat <100> surface.
To gain a better understanding of the correlation between passivation qualities and the microstructure properties of (i)a-Si:H on flat <100> surface, the layers have been characterized mainly via Fourier-transform infrared spectroscopy (FTIR). From the analysis, it can be concluded that the passivation layer that contains
sufficient H and a higher fraction of monohydrides is beneficial for achieving a better passivation quality.
For the two-terminal tandem solar cells, bottom cells with (n)-contact on top are preferred due to the optical advantage of the perovskite top cells with the p-i-n configuration. Therefore, a first tandem cell with (n)a-Si:H has been fabricated in collaboration with TU Eindhoven resulting in 22.2% efficiency. Starting from
this first fabricated tandem cell, its main optical limitations have been identified by performing advanced optical simulations using GenPro4, and the main strategies to overcome these optical drawbacks have been defined. By optimizing the front anti-reflection layers (MgF2 and ITO) thicknesses (at 100 nm and 20 nm, respectively), and reducing C60 thickness from 20 to 10 nm, front reflections, and parasitic absorption can be minimized. Thus a gain of implied photocurrent density of 1.8 mA/cm2 for the tandem cell was obtained.
Further, by implementing (n)nc-SiOx:H doped layer in the SHJ bottom cell, instead of standard (n)a-Si:H layer the reflection between the top and bottom cell is also reduced, and enhanced light incorporation into the bottom cell is obtained. By adopting all the above optimizations and also adjusting the perovskite
layer from 473 nm to 530 nm, a total improvement of 2.7 mA/cm2 in implied photocurrent density with respect to the initial 22.2% tandem cell can be achieved.
After having identified different optically optimized SHJ bottom cells for tandem applications, both rear junction and front junction single-side-textured SHJ solar cells were fabricated. Firstly, the passivation quality of (i)a-Si:H/(n)-layer and (i)a-Si:H/(p)-layer on different (i)a-Si:H were investigated. Then RJ solar cells
with three different (n)-type layers [(n)nc-SiOx:H;(n)nc-Si:H;(n)a-Si:H)] have been fabricated with optimal thicknesses individuated from the tandem optical simulations. Furthermore, a tunnel recombination junction SHJ solar cell with a layer stack of (n)nc-Si:H/(p)nc-SiOx:H/(p)nc-Si:H has been fabricated and measured as well.
In conclusion, various doped contacts (both n- and p-type) were successfully implemented into SHJ solar cells, which delivered VOCs range from 700 to 714 mV and FFs range from 77.8% to 80.9%. Therefore, different well-functioning SHJ solar cells have been developed and are ready to be implemented as bottom cells for high-efficiency tandem devices.
Firstly, RF-PECVD deposition conditions of a (i)a-Si: H monolayer for symmetric <100> flat c-Si surfaces were optimized. The optimized (i)a-Si:H monolayer ( 10-nm-thick) was obtained using pure SiH4, which results in rather moderate passivation performances (teff = 1.2ms, i-VOC = 701 mV).
To improve further the passivation quality of monolayer (i)a-Si:H on flat <100> surface, other passivation approaches aiming at incorporating more H without promoting detrimental epitaxial growth have been investigated.
With a bilayer deposition approach, which features firstly a less H-containing (i)a-Si:H to prevent epitaxial growth and then a second H-rich (i)a-Si:H layer, the passivation properties were slightly enhanced to τeff=1.4 ms and i-VOC=704 mV. Subsequently, by combining the bilayer approach with a post HPT, τeff of 2.0
ms and an i-VOC of 714 mV were achieved. Finally, by combining the bilayer approach with an intermediate HPT, the optimal passivation sample was deposited, with τeff of 2.4 ms and an i-VOC of 720 mV on the flat <100> surface.
To gain a better understanding of the correlation between passivation qualities and the microstructure properties of (i)a-Si:H on flat <100> surface, the layers have been characterized mainly via Fourier-transform infrared spectroscopy (FTIR). From the analysis, it can be concluded that the passivation layer that contains
sufficient H and a higher fraction of monohydrides is beneficial for achieving a better passivation quality.
For the two-terminal tandem solar cells, bottom cells with (n)-contact on top are preferred due to the optical advantage of the perovskite top cells with the p-i-n configuration. Therefore, a first tandem cell with (n)a-Si:H has been fabricated in collaboration with TU Eindhoven resulting in 22.2% efficiency. Starting from
this first fabricated tandem cell, its main optical limitations have been identified by performing advanced optical simulations using GenPro4, and the main strategies to overcome these optical drawbacks have been defined. By optimizing the front anti-reflection layers (MgF2 and ITO) thicknesses (at 100 nm and 20 nm, respectively), and reducing C60 thickness from 20 to 10 nm, front reflections, and parasitic absorption can be minimized. Thus a gain of implied photocurrent density of 1.8 mA/cm2 for the tandem cell was obtained.
Further, by implementing (n)nc-SiOx:H doped layer in the SHJ bottom cell, instead of standard (n)a-Si:H layer the reflection between the top and bottom cell is also reduced, and enhanced light incorporation into the bottom cell is obtained. By adopting all the above optimizations and also adjusting the perovskite
layer from 473 nm to 530 nm, a total improvement of 2.7 mA/cm2 in implied photocurrent density with respect to the initial 22.2% tandem cell can be achieved.
After having identified different optically optimized SHJ bottom cells for tandem applications, both rear junction and front junction single-side-textured SHJ solar cells were fabricated. Firstly, the passivation quality of (i)a-Si:H/(n)-layer and (i)a-Si:H/(p)-layer on different (i)a-Si:H were investigated. Then RJ solar cells
with three different (n)-type layers [(n)nc-SiOx:H;(n)nc-Si:H;(n)a-Si:H)] have been fabricated with optimal thicknesses individuated from the tandem optical simulations. Furthermore, a tunnel recombination junction SHJ solar cell with a layer stack of (n)nc-Si:H/(p)nc-SiOx:H/(p)nc-Si:H has been fabricated and measured as well.
In conclusion, various doped contacts (both n- and p-type) were successfully implemented into SHJ solar cells, which delivered VOCs range from 700 to 714 mV and FFs range from 77.8% to 80.9%. Therefore, different well-functioning SHJ solar cells have been developed and are ready to be implemented as bottom cells for high-efficiency tandem devices.
Master thesis
(2021)
-
C. Li, Olindo Isabella, Guangtao Yang, Yifeng Zhao, Miro Zeman, M. Mastrangeli
Interdigitated back-contacted solar cell (IBC) is a successful high-efficiency solar cell concept. Without a metal grid at the front side, the metal shading loss is eliminated. However, the fabrication process of an IBC cell is much more complicated than that of a FBC cell. Within the PVMD group, two poly-Si carrier-selective passivating contacts (CSPCs) IBC cell fabrication methods were developed, namely Self-aligned and Etch-back method. These two methods require respectively to pattern the IBC rear side twice and three times to define the emitter and BSF area. In this project, a novel poly-Si/SHJ hybrid IBC solar cell design using tunneling recombination junction (TRJ) is proposed, which only requires one pattern step to define the emitter and BSF area, thus, significantly simplifies the flowcharts of IBC cells.
The main objective of this thesis is to demonstrate the novel poly-Si/SHJ hybrid TRJ IBC cell concept by fabricating such high-efficiency hybrid IBC cells. With the proposed hybrid IBC cell design, the BSF layers are deposited on the full rear side after the emitter patterning. Thus, a TRJ is introduced at the emitter ((p+)poly-Si). The carrier tunneling efficiency across the TRJ layers should be guaranteed. The BSF layers passivation quality is also crucial for hybrid IBC cell performance, and the shunting due to the full area deposited BSF layers should be limited as well.
The TRJ proof-of-concept was firstly demonstrated in FBC cells due to their easier fabrication processes. And different materials combinations of (i)a-Si:H, (n)a-Si:H and (n)nc-Si:H were used to form TRJ with (p+)poly-SiOx. Firstly, it was found that the existence of (i)a-Si:H is detrimental to the device performance, especially for the cell FF. Secondly, for cells without (i)a-Si:H layer, the cell performance was improved by replacing (n)a-Si:H with more conductive and low activation energy (n)nc-Si:H layer. At last, the TRJ with dual-n-layer, (p+)poly-SiOx/(n)a-Si:H/(n)nc-Si:H, was found to be most promising. And the cell FF decreases with (n)a-Si:H layer thickness. However, instead of only depositing (n)nc-Si:H, the (n)a-Si:H was kept for its better passivation ability than (n)nc-Si:H, as it is directly deposited on the c-Si surface at BSF in hybrid IBC cells.
Then the hybrid design with dual-n-layer was demonstrated and optimized regarding the passivation quality, TRJ efficiency and the Rshunt in IBC cells. We firstly demonstrated that poly-Si delivers better performance than poly-SiOx due to its lower resistivity. With 18 nm(at textured BSF)(n)n-Si:H, the (n)a-Si:H layer thickness optimizes at 3 nm in poly-Si/SHJ hybrid cells. The pitch width was also found to have an influence on cell external parameters as the number of fingers decreases with pitch width. The cell FF increases and the Jsc decreases with pitch widening. The best cell obtained in this project has 3/18 nm (n)a-Si:H/(n)nc-Si:H and a medium pitch width (650 μm). It has a Voc of 665 mV, a Jsc of 39.36 mA/cm2, a FF of 74.33% and an efficiency of 19.45%. ...
The main objective of this thesis is to demonstrate the novel poly-Si/SHJ hybrid TRJ IBC cell concept by fabricating such high-efficiency hybrid IBC cells. With the proposed hybrid IBC cell design, the BSF layers are deposited on the full rear side after the emitter patterning. Thus, a TRJ is introduced at the emitter ((p+)poly-Si). The carrier tunneling efficiency across the TRJ layers should be guaranteed. The BSF layers passivation quality is also crucial for hybrid IBC cell performance, and the shunting due to the full area deposited BSF layers should be limited as well.
The TRJ proof-of-concept was firstly demonstrated in FBC cells due to their easier fabrication processes. And different materials combinations of (i)a-Si:H, (n)a-Si:H and (n)nc-Si:H were used to form TRJ with (p+)poly-SiOx. Firstly, it was found that the existence of (i)a-Si:H is detrimental to the device performance, especially for the cell FF. Secondly, for cells without (i)a-Si:H layer, the cell performance was improved by replacing (n)a-Si:H with more conductive and low activation energy (n)nc-Si:H layer. At last, the TRJ with dual-n-layer, (p+)poly-SiOx/(n)a-Si:H/(n)nc-Si:H, was found to be most promising. And the cell FF decreases with (n)a-Si:H layer thickness. However, instead of only depositing (n)nc-Si:H, the (n)a-Si:H was kept for its better passivation ability than (n)nc-Si:H, as it is directly deposited on the c-Si surface at BSF in hybrid IBC cells.
Then the hybrid design with dual-n-layer was demonstrated and optimized regarding the passivation quality, TRJ efficiency and the Rshunt in IBC cells. We firstly demonstrated that poly-Si delivers better performance than poly-SiOx due to its lower resistivity. With 18 nm(at textured BSF)(n)n-Si:H, the (n)a-Si:H layer thickness optimizes at 3 nm in poly-Si/SHJ hybrid cells. The pitch width was also found to have an influence on cell external parameters as the number of fingers decreases with pitch width. The cell FF increases and the Jsc decreases with pitch widening. The best cell obtained in this project has 3/18 nm (n)a-Si:H/(n)nc-Si:H and a medium pitch width (650 μm). It has a Voc of 665 mV, a Jsc of 39.36 mA/cm2, a FF of 74.33% and an efficiency of 19.45%. ...
Interdigitated back-contacted solar cell (IBC) is a successful high-efficiency solar cell concept. Without a metal grid at the front side, the metal shading loss is eliminated. However, the fabrication process of an IBC cell is much more complicated than that of a FBC cell. Within the PVMD group, two poly-Si carrier-selective passivating contacts (CSPCs) IBC cell fabrication methods were developed, namely Self-aligned and Etch-back method. These two methods require respectively to pattern the IBC rear side twice and three times to define the emitter and BSF area. In this project, a novel poly-Si/SHJ hybrid IBC solar cell design using tunneling recombination junction (TRJ) is proposed, which only requires one pattern step to define the emitter and BSF area, thus, significantly simplifies the flowcharts of IBC cells.
The main objective of this thesis is to demonstrate the novel poly-Si/SHJ hybrid TRJ IBC cell concept by fabricating such high-efficiency hybrid IBC cells. With the proposed hybrid IBC cell design, the BSF layers are deposited on the full rear side after the emitter patterning. Thus, a TRJ is introduced at the emitter ((p+)poly-Si). The carrier tunneling efficiency across the TRJ layers should be guaranteed. The BSF layers passivation quality is also crucial for hybrid IBC cell performance, and the shunting due to the full area deposited BSF layers should be limited as well.
The TRJ proof-of-concept was firstly demonstrated in FBC cells due to their easier fabrication processes. And different materials combinations of (i)a-Si:H, (n)a-Si:H and (n)nc-Si:H were used to form TRJ with (p+)poly-SiOx. Firstly, it was found that the existence of (i)a-Si:H is detrimental to the device performance, especially for the cell FF. Secondly, for cells without (i)a-Si:H layer, the cell performance was improved by replacing (n)a-Si:H with more conductive and low activation energy (n)nc-Si:H layer. At last, the TRJ with dual-n-layer, (p+)poly-SiOx/(n)a-Si:H/(n)nc-Si:H, was found to be most promising. And the cell FF decreases with (n)a-Si:H layer thickness. However, instead of only depositing (n)nc-Si:H, the (n)a-Si:H was kept for its better passivation ability than (n)nc-Si:H, as it is directly deposited on the c-Si surface at BSF in hybrid IBC cells.
Then the hybrid design with dual-n-layer was demonstrated and optimized regarding the passivation quality, TRJ efficiency and the Rshunt in IBC cells. We firstly demonstrated that poly-Si delivers better performance than poly-SiOx due to its lower resistivity. With 18 nm(at textured BSF)(n)n-Si:H, the (n)a-Si:H layer thickness optimizes at 3 nm in poly-Si/SHJ hybrid cells. The pitch width was also found to have an influence on cell external parameters as the number of fingers decreases with pitch width. The cell FF increases and the Jsc decreases with pitch widening. The best cell obtained in this project has 3/18 nm (n)a-Si:H/(n)nc-Si:H and a medium pitch width (650 μm). It has a Voc of 665 mV, a Jsc of 39.36 mA/cm2, a FF of 74.33% and an efficiency of 19.45%.
The main objective of this thesis is to demonstrate the novel poly-Si/SHJ hybrid TRJ IBC cell concept by fabricating such high-efficiency hybrid IBC cells. With the proposed hybrid IBC cell design, the BSF layers are deposited on the full rear side after the emitter patterning. Thus, a TRJ is introduced at the emitter ((p+)poly-Si). The carrier tunneling efficiency across the TRJ layers should be guaranteed. The BSF layers passivation quality is also crucial for hybrid IBC cell performance, and the shunting due to the full area deposited BSF layers should be limited as well.
The TRJ proof-of-concept was firstly demonstrated in FBC cells due to their easier fabrication processes. And different materials combinations of (i)a-Si:H, (n)a-Si:H and (n)nc-Si:H were used to form TRJ with (p+)poly-SiOx. Firstly, it was found that the existence of (i)a-Si:H is detrimental to the device performance, especially for the cell FF. Secondly, for cells without (i)a-Si:H layer, the cell performance was improved by replacing (n)a-Si:H with more conductive and low activation energy (n)nc-Si:H layer. At last, the TRJ with dual-n-layer, (p+)poly-SiOx/(n)a-Si:H/(n)nc-Si:H, was found to be most promising. And the cell FF decreases with (n)a-Si:H layer thickness. However, instead of only depositing (n)nc-Si:H, the (n)a-Si:H was kept for its better passivation ability than (n)nc-Si:H, as it is directly deposited on the c-Si surface at BSF in hybrid IBC cells.
Then the hybrid design with dual-n-layer was demonstrated and optimized regarding the passivation quality, TRJ efficiency and the Rshunt in IBC cells. We firstly demonstrated that poly-Si delivers better performance than poly-SiOx due to its lower resistivity. With 18 nm(at textured BSF)(n)n-Si:H, the (n)a-Si:H layer thickness optimizes at 3 nm in poly-Si/SHJ hybrid cells. The pitch width was also found to have an influence on cell external parameters as the number of fingers decreases with pitch width. The cell FF increases and the Jsc decreases with pitch widening. The best cell obtained in this project has 3/18 nm (n)a-Si:H/(n)nc-Si:H and a medium pitch width (650 μm). It has a Voc of 665 mV, a Jsc of 39.36 mA/cm2, a FF of 74.33% and an efficiency of 19.45%.
Crystalline silicon (c-Si) solar cells that are well-established technologies have already achieved a power conversion efficiency (PCE) as high as 26.7% by using the interdigitated-back-contacted (IBC) configuration. However, this efficiency is still limited by the spectral mismatch between t¬he absorption characteristics of c-Si and the AM 1.5 spectrum. To better utilize especially the low wavelength irradiance and to exceed the single-junction silicon solar cell theoretical PCE limit (29.43%), the perovskite/c-Si tandem solar cell concept was proposed.
This thesis project aims to develop a high efficiency single-side textured front-back contacted (FBC) silicon heterojunction (SHJ) solar cell as the bottom cells for 2-terminal (2-T) perovskite/c-Si tandem solar cells. Therefore, we firstly focus on the optimizations of the deposition parameters (power and precursor gases) of hydrogenated intrinsic amorphous silicon ((i)a-Si:H) passivation layer and the subsequent application of hydrogen plasma treatment (HPT) on the (i)a-Si:H layer. An optimized 8.8 nm-thick single (i)a-Si:H together with hydrogen plasma treatment (HPT) achieve an effective lifetime (τeff) of 1.3 ms, implied open-circuit voltage (iVOC) of 704.3 mV on symmetrical passivated double-side-flat <100> oriented crystalline silicon (c-Si) wafer. To further improve the passivation, a bilayer structure of (i)a-Si:H with a total thickness of 10 nm is optimized to boost further the τeff to 8.3 ms and iVOC to 733.5 mV.
Afterwards, we implement the optimized (i)a-Si:H layers into the front/back-contacted (FBC) rear junction solar cells with single-side textured morphology, which is designed to be used as the substrate for future integration of solution-processed perovskite top cell. For solar cells investigated, we keep the textured rear side always the same with optimized contact stacks consisting of p-type hydrogenated nanocrystalline silicon oxide ((p)-nc-SiOX:H) and p-type hydrogenated nanocrystalline silicon ((p)-nc-Si:H, while varying the layer stacks on the flat front side. Specifically cell performances are studied with either n-type hydrogenated nanocrystalline silicon ((n)-nc-Si:H) or n-type hydrogenated amorphous silicon ((n)-a-Si:H) with varied optimized (i)a-Si:H layers. We observe enhanced passivation qualities of solar cell precusors when adding the (n)-nc-Si:H/(n)-a-Si:H layer on top of the (i)a-Si:H, which enables the potential for realizing high-efficiency solar cells.
During the fabrication of FBC-SHJ solar cells, we also find that a thinner (i)a-Si:H on the front side is critical to improve the device efficiency thanks to the effective reduction of both parasitic absorption and carrier transport losses. Accordingly the gain in JSC and FF dominate the improvement of PCE. Lastly, we present rear junction FBC-SHJ solar cell with n optimized stack of (n)nc-Si:H and (i)a-Si:H, with VOC of 711 mV, JSC of 34.82 mA/cm2, FF of 79.64% and PCE of 19.72%. This optimized solar cell is also considered to be ready for its application in tandem device fabrication.
...
Crystalline silicon (c-Si) solar cells that are well-established technologies have already achieved a power conversion efficiency (PCE) as high as 26.7% by using the interdigitated-back-contacted (IBC) configuration. However, this efficiency is still limited by the spectral mismatch between t¬he absorption characteristics of c-Si and the AM 1.5 spectrum. To better utilize especially the low wavelength irradiance and to exceed the single-junction silicon solar cell theoretical PCE limit (29.43%), the perovskite/c-Si tandem solar cell concept was proposed.
This thesis project aims to develop a high efficiency single-side textured front-back contacted (FBC) silicon heterojunction (SHJ) solar cell as the bottom cells for 2-terminal (2-T) perovskite/c-Si tandem solar cells. Therefore, we firstly focus on the optimizations of the deposition parameters (power and precursor gases) of hydrogenated intrinsic amorphous silicon ((i)a-Si:H) passivation layer and the subsequent application of hydrogen plasma treatment (HPT) on the (i)a-Si:H layer. An optimized 8.8 nm-thick single (i)a-Si:H together with hydrogen plasma treatment (HPT) achieve an effective lifetime (τeff) of 1.3 ms, implied open-circuit voltage (iVOC) of 704.3 mV on symmetrical passivated double-side-flat <100> oriented crystalline silicon (c-Si) wafer. To further improve the passivation, a bilayer structure of (i)a-Si:H with a total thickness of 10 nm is optimized to boost further the τeff to 8.3 ms and iVOC to 733.5 mV.
Afterwards, we implement the optimized (i)a-Si:H layers into the front/back-contacted (FBC) rear junction solar cells with single-side textured morphology, which is designed to be used as the substrate for future integration of solution-processed perovskite top cell. For solar cells investigated, we keep the textured rear side always the same with optimized contact stacks consisting of p-type hydrogenated nanocrystalline silicon oxide ((p)-nc-SiOX:H) and p-type hydrogenated nanocrystalline silicon ((p)-nc-Si:H, while varying the layer stacks on the flat front side. Specifically cell performances are studied with either n-type hydrogenated nanocrystalline silicon ((n)-nc-Si:H) or n-type hydrogenated amorphous silicon ((n)-a-Si:H) with varied optimized (i)a-Si:H layers. We observe enhanced passivation qualities of solar cell precusors when adding the (n)-nc-Si:H/(n)-a-Si:H layer on top of the (i)a-Si:H, which enables the potential for realizing high-efficiency solar cells.
During the fabrication of FBC-SHJ solar cells, we also find that a thinner (i)a-Si:H on the front side is critical to improve the device efficiency thanks to the effective reduction of both parasitic absorption and carrier transport losses. Accordingly the gain in JSC and FF dominate the improvement of PCE. Lastly, we present rear junction FBC-SHJ solar cell with n optimized stack of (n)nc-Si:H and (i)a-Si:H, with VOC of 711 mV, JSC of 34.82 mA/cm2, FF of 79.64% and PCE of 19.72%. This optimized solar cell is also considered to be ready for its application in tandem device fabrication.